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Yuantian Tang473bbc42019-04-10 16:43:35 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Priyanka Singh874c52e2020-02-21 05:57:03 +05303 * Copyright 2019-2020 NXP
Yuantian Tang473bbc42019-04-10 16:43:35 +08004 */
5
6#ifndef __LS1028A_QDS_H
7#define __LS1028A_QDS_H
8
9#include "ls1028a_common.h"
10
Tom Rini8c70baa2021-12-14 13:36:40 -050011#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Yuantian Tang473bbc42019-04-10 16:43:35 +080012
13/* DDR */
14#define CONFIG_DIMM_SLOTS_PER_CTLR 2
15
16#define CONFIG_QIXIS_I2C_ACCESS
Yuantian Tang473bbc42019-04-10 16:43:35 +080017
18/*
19 * QIXIS Definitions
20 */
21#define CONFIG_FSL_QIXIS
22
23#ifdef CONFIG_FSL_QIXIS
24#define QIXIS_BASE 0x7fb00000
25#define QIXIS_BASE_PHYS QIXIS_BASE
26#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
27#define QIXIS_LBMAP_SWITCH 1
28#define QIXIS_LBMAP_MASK 0x0f
29#define QIXIS_LBMAP_SHIFT 5
30#define QIXIS_LBMAP_DFLTBANK 0x00
31#define QIXIS_LBMAP_ALTBANK 0x00
32#define QIXIS_LBMAP_SD 0x00
33#define QIXIS_LBMAP_EMMC 0x00
34#define QIXIS_LBMAP_QSPI 0x00
35#define QIXIS_RCW_SRC_SD 0x8
36#define QIXIS_RCW_SRC_EMMC 0x9
37#define QIXIS_RCW_SRC_QSPI 0xf
38#define QIXIS_RST_CTL_RESET 0x31
39#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
40#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
41#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
42#define QIXIS_RST_FORCE_MEM 0x01
43
44#define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
45#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
46 CSPR_PORT_SIZE_8 | \
47 CSPR_MSEL_GPCM | \
48 CSPR_V)
49#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
50#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
51 CSOR_NOR_NOR_MODE_AVD_NOR | \
52 CSOR_NOR_TRHZ_80)
53#endif
54
55/* RTC */
56#define CONFIG_SYS_RTC_BUS_NUM 1
57#define I2C_MUX_CH_RTC 0xB
58
59/* Store environment at top of flash */
Yuantian Tang473bbc42019-04-10 16:43:35 +080060
61#ifdef CONFIG_SPL_BUILD
62#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
63#else
64#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
65#endif
66
Yuantian Tangd46f65e2020-03-19 16:48:23 +080067/* LPUART */
68#ifdef CONFIG_LPUART
Yuantian Tangd46f65e2020-03-19 16:48:23 +080069#define CFG_LPUART_MUX_MASK 0xf0
70#define CFG_LPUART_EN 0xf0
71#endif
72
Yuantian Tang473bbc42019-04-10 16:43:35 +080073/* SATA */
Yuantian Tang473bbc42019-04-10 16:43:35 +080074
75#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
Yuantian Tang473bbc42019-04-10 16:43:35 +080076#ifndef SPL_NO_ENV
77#undef CONFIG_EXTRA_ENV_SETTINGS
78#define CONFIG_EXTRA_ENV_SETTINGS \
79 "board=ls1028aqds\0" \
80 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
81 "ramdisk_addr=0x800000\0" \
82 "ramdisk_size=0x2000000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080083 "fdt_addr=0x00f00000\0" \
84 "kernel_addr=0x01000000\0" \
85 "scriptaddr=0x80000000\0" \
86 "scripthdraddr=0x80080000\0" \
87 "fdtheader_addr_r=0x80100000\0" \
88 "kernelheader_addr_r=0x80200000\0" \
89 "load_addr=0xa0000000\0" \
90 "kernel_addr_r=0x81000000\0" \
91 "fdt_addr_r=0x90000000\0" \
Yuantian Tang18c20022020-03-20 14:37:06 +080092 "fdt2_addr_r=0x90010000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080093 "ramdisk_addr_r=0xa0000000\0" \
94 "kernel_start=0x1000000\0" \
Priyanka Singh874c52e2020-02-21 05:57:03 +053095 "kernelheader_start=0x600000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080096 "kernel_load=0xa0000000\0" \
97 "kernel_size=0x2800000\0" \
98 "kernelheader_size=0x40000\0" \
99 "kernel_addr_sd=0x8000\0" \
100 "kernel_size_sd=0x14000\0" \
Priyanka Singh874c52e2020-02-21 05:57:03 +0530101 "kernelhdr_addr_sd=0x3000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800102 "kernelhdr_size_sd=0x10\0" \
103 "console=ttyS0,115200\0" \
104 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
105 BOOTENV \
106 "boot_scripts=ls1028aqds_boot.scr\0" \
107 "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
108 "scan_dev_for_boot_part=" \
109 "part list ${devtype} ${devnum} devplist; " \
110 "env exists devplist || setenv devplist 1; " \
111 "for distro_bootpart in ${devplist}; do " \
112 "if fstype ${devtype} " \
113 "${devnum}:${distro_bootpart} " \
114 "bootfstype; then " \
115 "run scan_dev_for_boot; " \
116 "fi; " \
117 "done\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800118 "boot_a_script=" \
119 "load ${devtype} ${devnum}:${distro_bootpart} " \
120 "${scriptaddr} ${prefix}${script}; " \
121 "env exists secureboot && load ${devtype} " \
122 "${devnum}:${distro_bootpart} " \
123 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
124 "&& esbc_validate ${scripthdraddr};" \
125 "source ${scriptaddr}\0" \
Yuantian Tang18c20022020-03-20 14:37:06 +0800126 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
127 "sf probe 0:0 && sf read $load_addr " \
128 "$kernel_start $kernel_size ; env exists secureboot &&" \
129 "sf read $kernelheader_addr_r $kernelheader_start " \
130 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
131 " bootm $load_addr#$board\0" \
132 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
133 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
134 "&& hdp load $load_addr 0x2000\0" \
135 "sd_bootcmd=echo Trying load from SD ...;" \
136 "mmc dev 0; mmcinfo; mmc read $load_addr " \
137 "$kernel_addr_sd $kernel_size_sd && " \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800138 "env exists secureboot && mmc read $kernelheader_addr_r " \
Yuantian Tang18c20022020-03-20 14:37:06 +0800139 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
140 " && esbc_validate ${kernelheader_addr_r};" \
141 "bootm $load_addr#$board\0" \
142 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
143 "mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 " \
144 "&& hdp load $load_addr 0x2000\0" \
145 "emmc_bootcmd=echo Trying load from EMMC ..;" \
146 "mmc dev 1; mmcinfo; mmc read $load_addr " \
147 "$kernel_addr_sd $kernel_size_sd && " \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800148 "env exists secureboot && mmc read $kernelheader_addr_r " \
Yuantian Tang18c20022020-03-20 14:37:06 +0800149 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800150 " && esbc_validate ${kernelheader_addr_r};" \
Yuantian Tang18c20022020-03-20 14:37:06 +0800151 "bootm $load_addr#$board\0" \
152 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
153 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
154 "&& hdp load $load_addr 0x2000\0"
155
Yuantian Tang473bbc42019-04-10 16:43:35 +0800156#endif
157#endif /* __LS1028A_QDS_H */