| Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 1 | /** |
| 2 | * @file IxEthAccQueueAssign_p.h |
| 3 | * |
| 4 | * @author Intel Corporation |
| 5 | * @date 06-Mar-2002 |
| 6 | * |
| 7 | * @brief Mapping from QMgr Q's to internal assignment |
| 8 | * |
| 9 | * Design Notes: |
| 10 | * |
| 11 | * |
| 12 | * @par |
| 13 | * IXP400 SW Release version 2.0 |
| 14 | * |
| 15 | * -- Copyright Notice -- |
| 16 | * |
| 17 | * @par |
| 18 | * Copyright 2001-2005, Intel Corporation. |
| 19 | * All rights reserved. |
| 20 | * |
| 21 | * @par |
| Wolfgang Denk | c57eadc | 2013-07-28 22:12:47 +0200 | [diff] [blame] | 22 | * SPDX-License-Identifier: BSD-3-Clause |
| Wolfgang Denk | 4646d2a | 2006-05-30 15:56:48 +0200 | [diff] [blame] | 23 | * @par |
| 24 | * -- End of Copyright Notice -- |
| 25 | */ |
| 26 | |
| 27 | /** |
| 28 | * @addtogroup IxEthAccPri |
| 29 | *@{ |
| 30 | */ |
| 31 | |
| 32 | /* |
| 33 | * Os/System dependancies. |
| 34 | */ |
| 35 | #include "IxOsal.h" |
| 36 | |
| 37 | /* |
| 38 | * Intermodule dependancies |
| 39 | */ |
| 40 | #include "IxQMgr.h" |
| 41 | #include "IxQueueAssignments.h" |
| 42 | |
| 43 | /* Check range of Q's assigned to this component. */ |
| 44 | #if IX_ETH_ACC_RX_FRAME_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID ) | \ |
| 45 | IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \ |
| 46 | IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \ |
| 47 | IX_ETH_ACC_TX_FRAME_ENET0_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \ |
| 48 | IX_ETH_ACC_TX_FRAME_ENET1_Q >= (IX_QMGR_MIN_QUEUPP_QID) | \ |
| 49 | IX_ETH_ACC_TX_FRAME_DONE_ETH_Q >= (IX_QMGR_MIN_QUEUPP_QID) |
| 50 | #error "Not all Ethernet Access Queues are betweem 1-31, requires full functionalty Q's unless otherwise validated " |
| 51 | #endif |
| 52 | |
| 53 | /** |
| 54 | * |
| 55 | * @typedef IxEthAccQregInfo |
| 56 | * |
| 57 | * @brief |
| 58 | * |
| 59 | */ |
| 60 | typedef struct |
| 61 | { |
| 62 | IxQMgrQId qId; |
| 63 | char *qName; |
| 64 | IxQMgrCallback qCallback; |
| 65 | IxQMgrCallbackId callbackTag; |
| 66 | IxQMgrQSizeInWords qSize; |
| 67 | IxQMgrQEntrySizeInWords qWords; |
| 68 | BOOL qNotificationEnableAtStartup; |
| 69 | IxQMgrSourceId qConditionSource; |
| 70 | IxQMgrWMLevel AlmostEmptyThreshold; |
| 71 | IxQMgrWMLevel AlmostFullThreshold; |
| 72 | |
| 73 | } IxEthAccQregInfo; |
| 74 | |
| 75 | /* |
| 76 | * Prototypes for all QM callbacks. |
| 77 | */ |
| 78 | |
| 79 | /* |
| 80 | * Rx Callbacks |
| 81 | */ |
| 82 | IX_ETH_ACC_PUBLIC |
| 83 | void ixEthRxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId); |
| 84 | |
| 85 | IX_ETH_ACC_PUBLIC |
| 86 | void ixEthRxMultiBufferQMCallback(IxQMgrQId, IxQMgrCallbackId); |
| 87 | |
| 88 | IX_ETH_ACC_PUBLIC |
| 89 | void ixEthRxFreeQMCallback(IxQMgrQId, IxQMgrCallbackId); |
| 90 | |
| 91 | /* |
| 92 | * Tx Callback. |
| 93 | */ |
| 94 | IX_ETH_ACC_PUBLIC |
| 95 | void ixEthTxFrameQMCallback(IxQMgrQId, IxQMgrCallbackId); |
| 96 | |
| 97 | IX_ETH_ACC_PUBLIC |
| 98 | void ixEthTxFrameDoneQMCallback(IxQMgrQId, IxQMgrCallbackId ); |
| 99 | |
| 100 | |
| 101 | #define IX_ETH_ACC_QM_QUEUE_DISPATCH_PRIORITY (IX_QMGR_Q_PRIORITY_0) /* Highest priority */ |
| 102 | |
| 103 | /* |
| 104 | * Queue watermarks |
| 105 | */ |
| 106 | #define IX_ETH_ACC_RX_FRAME_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E ) |
| 107 | #define IX_ETH_ACC_RX_FREE_BUFF_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E ) |
| 108 | #define IX_ETH_ACC_RX_FREE_BUFF_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E ) |
| 109 | #define IX_ETH_ACC_RX_FREE_BUFF_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E ) |
| 110 | #define IX_ETH_ACC_TX_FRAME_ENET0_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E ) |
| 111 | #define IX_ETH_ACC_TX_FRAME_ENET1_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E ) |
| 112 | #define IX_ETH_ACC_TX_FRAME_ENET2_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_E ) |
| 113 | #define IX_ETH_ACC_TX_FRAME_DONE_ETH_Q_SOURCE (IX_QMGR_Q_SOURCE_ID_NOT_E ) |