blob: 9d3708a36370e0a7e972f8ce271b30061d4d9a6f [file] [log] [blame]
Marek Vasute7628752022-04-08 02:15:01 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2021-2022 Marek Vasut <marex@denx.de>
4 */
5
6#include <common.h>
7#include <asm/arch/clock.h>
8#include <asm/arch/imx8mm_pins.h>
9#include <asm/arch/sys_proto.h>
10#include <asm/global_data.h>
11#include <asm/io.h>
12#include <asm/mach-imx/iomux-v3.h>
13#include <spl.h>
14
Marek Vasute7628752022-04-08 02:15:01 +020015#define SNVS_BASE_ADDR 0x30370000
16#define SNVS_LPSR 0x4c
17#define SNVS_LPLVDR 0x64
18#define SNVS_LPPGDR_INIT 0x41736166
19
20static void setup_snvs(void)
21{
22 /* Enable SNVS clock */
23 clock_enable(CCGR_SNVS, 1);
24 /* Initialize glitch detect */
25 writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR);
26 /* Clear interrupt status */
27 writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR);
28}
29
30void board_early_init(void)
31{
Marek Vasute7628752022-04-08 02:15:01 +020032 init_uart_clk(1);
33
34 setup_snvs();
35}