Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 2 | /* |
Patrice Chotard | 9e21624 | 2017-10-23 09:53:57 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 10 | /* ram memory-related information */ |
| 11 | #define CONFIG_NR_DRAM_BANKS 1 |
| 12 | #define PHYS_SDRAM_1 0x40000000 |
| 13 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
Nicolas Le Bayon | e2db71e | 2017-09-25 09:14:19 +0200 | [diff] [blame] | 14 | #define PHYS_SDRAM_1_SIZE 0x3E000000 |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 15 | #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 /* default load addr */ |
| 16 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 17 | #define CONFIG_SYS_HZ_CLOCK 1000000000 /* 1 GHz */ |
| 18 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 19 | /* Environment */ |
Patrice Chotard | 78b4e04 | 2017-09-25 09:14:18 +0200 | [diff] [blame] | 20 | |
| 21 | #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR |
| 22 | |
Patrice Chotard | 78b4e04 | 2017-09-25 09:14:18 +0200 | [diff] [blame] | 23 | #define BOOT_TARGET_DEVICES(func) \ |
| 24 | func(MMC, mmc, 0) \ |
| 25 | func(USB, usb, 0) \ |
| 26 | func(DHCP, dhcp, na) |
| 27 | #include <config_distro_bootcmd.h> |
| 28 | #define CONFIG_BOOTFILE "uImage" |
| 29 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 30 | "kernel_addr_r=0x40000000\0" \ |
| 31 | "fdtfile=stih410-b2260.dtb\0" \ |
| 32 | "fdt_addr_r=0x47000000\0" \ |
| 33 | "scriptaddr=0x50000000\0" \ |
Riku Voipio | a80cd22 | 2018-05-24 17:15:26 +0300 | [diff] [blame] | 34 | "pxefile_addr_r=0x50100000\0" \ |
Patrice Chotard | 78b4e04 | 2017-09-25 09:14:18 +0200 | [diff] [blame] | 35 | "fdt_high=0xffffffffffffffff\0" \ |
| 36 | "initrd_high=0xffffffffffffffff\0" \ |
Lee Jones | 2b1760f | 2017-09-25 09:14:20 +0200 | [diff] [blame] | 37 | "ramdisk_addr_r=0x48000000\0" \ |
Patrice Chotard | 78b4e04 | 2017-09-25 09:14:18 +0200 | [diff] [blame] | 38 | BOOTENV |
| 39 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 40 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 41 | #define CONFIG_ENV_SIZE 0x4000 |
| 42 | |
| 43 | /* Extra Commands */ |
| 44 | #define CONFIG_CMD_ASKENV |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 45 | |
| 46 | #define CONFIG_SETUP_MEMORY_TAGS |
| 47 | |
| 48 | /* Size of malloc() pool */ |
| 49 | #define CONFIG_SYS_MALLOC_LEN 0x1800000 |
| 50 | #define CONFIG_SYS_GBL_DATA_SIZE 1024 /* Global data structures */ |
| 51 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \ |
| 52 | CONFIG_SYS_MALLOC_LEN - \ |
| 53 | CONFIG_SYS_GBL_DATA_SIZE) |
| 54 | |
| 55 | /* Monitor Command Prompt */ |
| 56 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 57 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 58 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 59 | |
| 60 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 61 | |
Patrice Chotard | 2b0e698 | 2017-09-05 11:04:22 +0200 | [diff] [blame] | 62 | /* USB Configs */ |
| 63 | #define CONFIG_USB_OHCI_NEW |
| 64 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
| 65 | |
| 66 | #define CONFIG_USB_HOST_ETHER |
| 67 | #define CONFIG_USB_ETHER_ASIX |
| 68 | #define CONFIG_USB_ETHER_MCS7830 |
| 69 | #define CONFIG_USB_ETHER_SMSC95XX |
| 70 | |
| 71 | /* NET Configs */ |
Patrice Chotard | 2b0e698 | 2017-09-05 11:04:22 +0200 | [diff] [blame] | 72 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 73 | #endif /* __CONFIG_H */ |