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Michael Schwingen06a9e122008-01-16 19:53:23 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * (C) Copyright 2006
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 *
8 * (C) Copyright 2002
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10 *
11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <command.h>
36#include <malloc.h>
37#include <asm/arch/ixp425.h>
Michael Schwingen67ea3d92011-05-23 00:00:07 +020038#include <asm/io.h>
Michael Schwingen06a9e122008-01-16 19:53:23 +010039#include <miiphy.h>
Michael Schwingen67ea3d92011-05-23 00:00:07 +020040#ifdef CONFIG_PCI
41#include <pci.h>
42#include <asm/arch/ixp425pci.h>
43#endif
Michael Schwingen06a9e122008-01-16 19:53:23 +010044
45#include "actux4_hw.h"
46
47DECLARE_GLOBAL_DATA_PTR;
48
Michael Schwingen67ea3d92011-05-23 00:00:07 +020049int board_early_init_f(void)
50{
51 writel(0xbd113c42, IXP425_EXP_CS1);
52 return 0;
53}
54
55int board_init(void)
Michael Schwingen06a9e122008-01-16 19:53:23 +010056{
Michael Schwingen06a9e122008-01-16 19:53:23 +010057 /* adress of boot parameters */
58 gd->bd->bi_boot_params = 0x00000100;
59
Michael Schwingen67ea3d92011-05-23 00:00:07 +020060 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON);
61 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON);
Michael Schwingen06a9e122008-01-16 19:53:23 +010062
Michael Schwingen67ea3d92011-05-23 00:00:07 +020063 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
64 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
Michael Schwingen06a9e122008-01-16 19:53:23 +010065
66 /* led not populated on board*/
Michael Schwingen67ea3d92011-05-23 00:00:07 +020067 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3);
68 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3);
Michael Schwingen06a9e122008-01-16 19:53:23 +010069
70 /* middle LED */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020071 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2);
72 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2);
Michael Schwingen06a9e122008-01-16 19:53:23 +010073
74 /* right LED */
75 /* weak pulldown = LED weak on */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020076 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1);
77 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1);
Michael Schwingen06a9e122008-01-16 19:53:23 +010078
79 /* Setup GPIO's for Interrupt inputs */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020080 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA);
81 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB);
82 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC);
83 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT);
84 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA);
85 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB);
Michael Schwingen06a9e122008-01-16 19:53:23 +010086
Michael Schwingen67ea3d92011-05-23 00:00:07 +020087 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA);
88 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB);
89 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC);
90 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT);
91 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA);
92 GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB);
Michael Schwingen06a9e122008-01-16 19:53:23 +010093
94 /* Setup GPIO's for 33MHz clock output */
Michael Schwingen67ea3d92011-05-23 00:00:07 +020095 writel(0x011001FF, IXP425_GPIO_GPCLKR);
96 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
97 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
Michael Schwingen06a9e122008-01-16 19:53:23 +010098
Michael Schwingen67ea3d92011-05-23 00:00:07 +020099 udelay(10000);
100 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
101 udelay(10000);
102 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
103 udelay(10000);
104 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
Michael Schwingen06a9e122008-01-16 19:53:23 +0100105
106 return 0;
107}
108
109/* Check Board Identity */
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200110int checkboard(void)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100111{
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200112 puts("Board: AcTux-4\n");
113 return 0;
Michael Schwingen06a9e122008-01-16 19:53:23 +0100114}
115
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200116int dram_init(void)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100117{
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200118 gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
119 return 0;
120}
Michael Schwingen06a9e122008-01-16 19:53:23 +0100121
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200122#ifdef CONFIG_PCI
123struct pci_controller hose;
124
125void pci_init_board(void)
126{
127 pci_ixp_init(&hose);
Michael Schwingen06a9e122008-01-16 19:53:23 +0100128}
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200129#endif
Michael Schwingen06a9e122008-01-16 19:53:23 +0100130
131/*
132 * Hardcoded flash setup:
133 * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus.
134 * Flash 1 is an Intel *16 flash using the CFI driver.
135 */
Michael Schwingen67ea3d92011-05-23 00:00:07 +0200136ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
Michael Schwingen06a9e122008-01-16 19:53:23 +0100137{
138 if (banknum == 0) { /* non-CFI boot flash */
139 info->portwidth = 1;
140 info->chipwidth = 1;
141 info->interface = FLASH_CFI_X8;
142 return 1;
143 } else
144 return 0;
145}