Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 2 | /* |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 3 | * AXP221 and AXP223 driver |
| 4 | * |
| 5 | * IMPORTANT when making changes to this file check that the registers |
| 6 | * used are the same for the axp221 and axp223. |
| 7 | * |
| 8 | * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 9 | * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 10 | */ |
| 11 | |
Hans de Goede | 6391f0e | 2015-12-20 16:14:31 +0100 | [diff] [blame] | 12 | #include <command.h> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 13 | #include <errno.h> |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 14 | #include <asm/arch/pmic_bus.h> |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 15 | #include <axp_pmic.h> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 16 | |
| 17 | static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div) |
| 18 | { |
| 19 | if (mvolt < min) |
| 20 | mvolt = min; |
| 21 | else if (mvolt > max) |
| 22 | mvolt = max; |
| 23 | |
| 24 | return (mvolt - min) / div; |
| 25 | } |
| 26 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 27 | int axp_set_dcdc1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 28 | { |
| 29 | int ret; |
| 30 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100); |
| 31 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 32 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 33 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 34 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 35 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 36 | ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 37 | if (ret) |
| 38 | return ret; |
| 39 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 40 | ret = pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 41 | AXP221_OUTPUT_CTRL2_DCDC1SW_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 42 | if (ret) |
| 43 | return ret; |
| 44 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 45 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 46 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 47 | } |
| 48 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 49 | int axp_set_dcdc2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 50 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 51 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 52 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 53 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 54 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 55 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 56 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 57 | |
| 58 | ret = pmic_bus_write(AXP221_DCDC2_CTRL, cfg); |
| 59 | if (ret) |
| 60 | return ret; |
| 61 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 62 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 63 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 64 | } |
| 65 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 66 | int axp_set_dcdc3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 67 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 68 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 69 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20); |
| 70 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 71 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 72 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 73 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 74 | |
| 75 | ret = pmic_bus_write(AXP221_DCDC3_CTRL, cfg); |
| 76 | if (ret) |
| 77 | return ret; |
| 78 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 79 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 80 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 81 | } |
| 82 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 83 | int axp_set_dcdc4(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 84 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 85 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 86 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 87 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 88 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 89 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 90 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 91 | |
| 92 | ret = pmic_bus_write(AXP221_DCDC4_CTRL, cfg); |
| 93 | if (ret) |
| 94 | return ret; |
| 95 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 96 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 97 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 98 | } |
| 99 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 100 | int axp_set_dcdc5(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 101 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 102 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 103 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50); |
| 104 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 105 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 106 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 107 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 108 | |
| 109 | ret = pmic_bus_write(AXP221_DCDC5_CTRL, cfg); |
| 110 | if (ret) |
| 111 | return ret; |
| 112 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 113 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 114 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 115 | } |
| 116 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 117 | int axp_set_aldo1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 118 | { |
| 119 | int ret; |
| 120 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 121 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 122 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 123 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 124 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 125 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 126 | ret = pmic_bus_write(AXP221_ALDO1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 127 | if (ret) |
| 128 | return ret; |
| 129 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 130 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 131 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 132 | } |
| 133 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 134 | int axp_set_aldo2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 135 | { |
| 136 | int ret; |
| 137 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 138 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 139 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 140 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 141 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 142 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 143 | ret = pmic_bus_write(AXP221_ALDO2_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 144 | if (ret) |
| 145 | return ret; |
| 146 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 147 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 148 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 149 | } |
| 150 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 151 | int axp_set_aldo3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 152 | { |
| 153 | int ret; |
| 154 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 155 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 156 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 157 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL3, |
| 158 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 159 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 160 | ret = pmic_bus_write(AXP221_ALDO3_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 161 | if (ret) |
| 162 | return ret; |
| 163 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 164 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL3, |
| 165 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 166 | } |
| 167 | |
Chen-Yu Tsai | 2e6911f | 2016-01-12 14:42:37 +0800 | [diff] [blame] | 168 | int axp_set_dldo(int dldo_num, unsigned int mvolt) |
| 169 | { |
| 170 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 171 | int ret; |
| 172 | |
| 173 | if (dldo_num < 1 || dldo_num > 4) |
| 174 | return -EINVAL; |
| 175 | |
| 176 | if (mvolt == 0) |
| 177 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 178 | AXP221_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); |
| 179 | |
| 180 | ret = pmic_bus_write(AXP221_DLDO1_CTRL + (dldo_num - 1), cfg); |
| 181 | if (ret) |
| 182 | return ret; |
| 183 | |
| 184 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 185 | AXP221_OUTPUT_CTRL2_DLDO1_EN << (dldo_num - 1)); |
| 186 | } |
| 187 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 188 | int axp_set_eldo(int eldo_num, unsigned int mvolt) |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 189 | { |
| 190 | int ret; |
| 191 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 192 | |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 193 | if (eldo_num < 1 || eldo_num > 3) |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 194 | return -EINVAL; |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 195 | |
| 196 | if (mvolt == 0) |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 197 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 198 | AXP221_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 199 | |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 200 | ret = pmic_bus_write(AXP221_ELDO1_CTRL + (eldo_num - 1), cfg); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 201 | if (ret) |
| 202 | return ret; |
| 203 | |
Chen-Yu Tsai | c80376c | 2016-05-02 10:28:10 +0800 | [diff] [blame] | 204 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 205 | AXP221_OUTPUT_CTRL2_ELDO1_EN << (eldo_num - 1)); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 206 | } |
| 207 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 208 | int axp_init(void) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 209 | { |
| 210 | u8 axp_chip_id; |
| 211 | int ret; |
| 212 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 213 | ret = pmic_bus_init(); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 214 | if (ret) |
| 215 | return ret; |
| 216 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 217 | ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 218 | if (ret) |
| 219 | return ret; |
| 220 | |
| 221 | if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17)) |
| 222 | return -ENODEV; |
| 223 | |
Hans de Goede | af7f67c | 2016-09-12 09:52:52 +0200 | [diff] [blame] | 224 | /* |
| 225 | * Turn off LDOIO regulators / tri-state GPIO pins, when rebooting |
| 226 | * from android these are sometimes on. |
| 227 | */ |
| 228 | ret = pmic_bus_write(AXP_GPIO0_CTRL, AXP_GPIO_CTRL_INPUT); |
| 229 | if (ret) |
| 230 | return ret; |
| 231 | |
| 232 | ret = pmic_bus_write(AXP_GPIO1_CTRL, AXP_GPIO_CTRL_INPUT); |
| 233 | if (ret) |
| 234 | return ret; |
| 235 | |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 236 | return 0; |
| 237 | } |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 238 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 239 | int axp_get_sid(unsigned int *sid) |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 240 | { |
| 241 | u8 *dest = (u8 *)sid; |
| 242 | int i, ret; |
| 243 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 244 | ret = pmic_bus_init(); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 245 | if (ret) |
| 246 | return ret; |
| 247 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 248 | ret = pmic_bus_write(AXP221_PAGE, 1); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 249 | if (ret) |
| 250 | return ret; |
| 251 | |
| 252 | for (i = 0; i < 16; i++) { |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 253 | ret = pmic_bus_read(AXP221_SID + i, &dest[i]); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 254 | if (ret) |
| 255 | return ret; |
| 256 | } |
| 257 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 258 | pmic_bus_write(AXP221_PAGE, 0); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 259 | |
| 260 | for (i = 0; i < 4; i++) |
| 261 | sid[i] = be32_to_cpu(sid[i]); |
| 262 | |
| 263 | return 0; |
| 264 | } |
Hans de Goede | 6391f0e | 2015-12-20 16:14:31 +0100 | [diff] [blame] | 265 | |
Samuel Holland | 41a545f | 2021-08-22 18:18:05 -0500 | [diff] [blame] | 266 | #if !IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF) |
Simon Glass | ed38aef | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 267 | int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
Hans de Goede | 6391f0e | 2015-12-20 16:14:31 +0100 | [diff] [blame] | 268 | { |
| 269 | pmic_bus_write(AXP221_SHUTDOWN, AXP221_SHUTDOWN_POWEROFF); |
| 270 | |
| 271 | /* infinite loop during shutdown */ |
| 272 | while (1) {} |
| 273 | |
| 274 | /* not reached */ |
| 275 | return 0; |
| 276 | } |
Samuel Holland | 41a545f | 2021-08-22 18:18:05 -0500 | [diff] [blame] | 277 | #endif |