blob: f851767a55f1dd75ff8caa2fde45071ca90210c1 [file] [log] [blame]
Stephen Warren24bfee62012-05-21 10:04:37 +00001/dts-v1/;
2
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +03003#include <dt-bindings/input/input.h>
Tom Warrenf6236152013-02-21 12:31:27 +00004#include "tegra20.dtsi"
Stephen Warren24bfee62012-05-21 10:04:37 +00005
6/ {
Tom Warrened955272013-02-21 12:31:29 +00007 model = "Toshiba AC100 / Dynabook AZ";
8 compatible = "compal,paz00", "nvidia,tegra20";
Stephen Warren24bfee62012-05-21 10:04:37 +00009
Simon Glass0c24f372014-09-04 16:27:35 -060010 chosen {
11 stdout-path = &uarta;
12 };
13
Stephen Warren24bfee62012-05-21 10:04:37 +000014 aliases {
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +030015 rtc0 = "/i2c@7000d000/tps6586x@34";
16 rtc1 = "/rtc@7000e000";
17 serial0 = &uarta;
18 serial1 = &uartc;
19 usb0 = "/usb@c5000000";
20 usb1 = "/usb@c5004000";
21 usb2 = "/usb@c5008000";
Stephen Warrend55aadc2016-09-13 10:45:43 -060022 mmc0 = "/sdhci@c8000600";
23 mmc1 = "/sdhci@c8000000";
Stephen Warren24bfee62012-05-21 10:04:37 +000024 };
25
26 memory {
27 reg = <0x00000000 0x20000000>;
28 };
29
Simon Glasse31a2a52016-01-30 16:37:52 -070030 host1x@50000000 {
Allen Martin0398dcb2013-01-16 13:12:24 +000031 status = "okay";
32 dc@54200000 {
33 status = "okay";
34 rgb {
35 status = "okay";
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +030036
37 nvidia,panel = <&panel>;
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +030038 };
39 };
40
41 hdmi@54280000 {
42 status = "okay";
43
44 vdd-supply = <&hdmi_vdd_reg>;
45 pll-supply = <&hdmi_pll_reg>;
46
47 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
48 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
49 GPIO_ACTIVE_HIGH>;
50 };
51 };
52
53 pinmux@70000014 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&state_default>;
56
57 state_default: pinmux {
58 ata {
59 nvidia,pins = "ata", "atc", "atd", "ate",
60 "dap2", "gmb", "gmc", "gmd", "spia",
61 "spib", "spic", "spid", "spie";
62 nvidia,function = "gmi";
63 };
64 atb {
65 nvidia,pins = "atb", "gma", "gme";
66 nvidia,function = "sdio4";
67 };
68 cdev1 {
69 nvidia,pins = "cdev1";
70 nvidia,function = "plla_out";
71 };
72 cdev2 {
73 nvidia,pins = "cdev2";
74 nvidia,function = "pllp_out4";
75 };
76 crtp {
77 nvidia,pins = "crtp";
78 nvidia,function = "crt";
79 };
80 csus {
81 nvidia,pins = "csus";
82 nvidia,function = "pllc_out1";
83 };
84 dap1 {
85 nvidia,pins = "dap1";
86 nvidia,function = "dap1";
87 };
88 dap3 {
89 nvidia,pins = "dap3";
90 nvidia,function = "dap3";
91 };
92 dap4 {
93 nvidia,pins = "dap4";
94 nvidia,function = "dap4";
95 };
96 ddc {
97 nvidia,pins = "ddc";
98 nvidia,function = "i2c2";
99 };
100 dta {
101 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
102 nvidia,function = "rsvd1";
103 };
104 dtf {
105 nvidia,pins = "dtf";
106 nvidia,function = "i2c3";
107 };
108 gpu {
109 nvidia,pins = "gpu", "sdb", "sdd";
110 nvidia,function = "pwm";
111 };
112 gpu7 {
113 nvidia,pins = "gpu7";
114 nvidia,function = "rtck";
115 };
116 gpv {
117 nvidia,pins = "gpv", "slxa", "slxk";
118 nvidia,function = "pcie";
119 };
120 hdint {
121 nvidia,pins = "hdint", "pta";
122 nvidia,function = "hdmi";
123 };
124 i2cp {
125 nvidia,pins = "i2cp";
126 nvidia,function = "i2cp";
127 };
128 irrx {
129 nvidia,pins = "irrx", "irtx";
130 nvidia,function = "uarta";
131 };
132 kbca {
133 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
134 nvidia,function = "kbc";
135 };
136 kbcb {
137 nvidia,pins = "kbcb", "kbcd";
138 nvidia,function = "sdio2";
139 };
140 lcsn {
141 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
142 "ld3", "ld4", "ld5", "ld6", "ld7",
143 "ld8", "ld9", "ld10", "ld11", "ld12",
144 "ld13", "ld14", "ld15", "ld16", "ld17",
145 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
146 "lhs", "lm0", "lm1", "lpp", "lpw0",
147 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
148 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
149 "lvs";
150 nvidia,function = "displaya";
151 };
152 owc {
153 nvidia,pins = "owc";
154 nvidia,function = "owr";
155 };
156 pmc {
157 nvidia,pins = "pmc";
158 nvidia,function = "pwr_on";
159 };
160 rm {
161 nvidia,pins = "rm";
162 nvidia,function = "i2c1";
163 };
164 sdc {
165 nvidia,pins = "sdc";
166 nvidia,function = "twc";
167 };
168 sdio1 {
169 nvidia,pins = "sdio1";
170 nvidia,function = "sdio1";
171 };
172 slxc {
173 nvidia,pins = "slxc", "slxd";
174 nvidia,function = "spi4";
175 };
176 spdi {
177 nvidia,pins = "spdi", "spdo";
178 nvidia,function = "rsvd2";
179 };
180 spif {
181 nvidia,pins = "spif", "uac";
182 nvidia,function = "rsvd4";
183 };
184 spig {
185 nvidia,pins = "spig", "spih";
186 nvidia,function = "spi2_alt";
187 };
188 uaa {
189 nvidia,pins = "uaa", "uab", "uda";
190 nvidia,function = "ulpi";
191 };
192 uad {
193 nvidia,pins = "uad";
194 nvidia,function = "spdif";
195 };
196 uca {
197 nvidia,pins = "uca", "ucb";
198 nvidia,function = "uartc";
199 };
200 conf_ata {
201 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
202 "cdev1", "cdev2", "dap1", "dap2", "dtf",
203 "gma", "gmb", "gmc", "gmd", "gme",
204 "gpu", "gpu7", "gpv", "i2cp", "pta",
205 "rm", "sdio1", "slxk", "spdo", "uac",
206 "uda";
207 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208 nvidia,tristate = <TEGRA_PIN_DISABLE>;
209 };
210 conf_ck32 {
211 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
212 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 };
215 conf_crtp {
216 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
217 "dtc", "dte", "slxa", "slxc", "slxd",
218 "spdi";
219 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220 nvidia,tristate = <TEGRA_PIN_ENABLE>;
221 };
222 conf_csus {
223 nvidia,pins = "csus", "spia", "spib", "spid",
224 "spif";
225 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
226 nvidia,tristate = <TEGRA_PIN_ENABLE>;
227 };
228 conf_ddc {
229 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
230 "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
231 "spic", "spig", "uaa", "uab";
232 nvidia,pull = <TEGRA_PIN_PULL_UP>;
233 nvidia,tristate = <TEGRA_PIN_DISABLE>;
234 };
235 conf_dta {
236 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
237 "spie", "spih", "uad", "uca", "ucb";
238 nvidia,pull = <TEGRA_PIN_PULL_UP>;
239 nvidia,tristate = <TEGRA_PIN_ENABLE>;
240 };
241 conf_hdint {
242 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
243 "ld3", "ld4", "ld5", "ld6", "ld7",
244 "ld8", "ld9", "ld10", "ld11", "ld12",
245 "ld13", "ld14", "ld15", "ld16", "ld17",
246 "ldc", "ldi", "lhs", "lsc0", "lspi",
247 "lvs", "pmc";
248 nvidia,tristate = <TEGRA_PIN_DISABLE>;
249 };
250 conf_lc {
251 nvidia,pins = "lc", "ls";
252 nvidia,pull = <TEGRA_PIN_PULL_UP>;
253 };
254 conf_lcsn {
255 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
256 "lm0", "lm1", "lpp", "lpw0", "lpw1",
257 "lpw2", "lsc1", "lsck", "lsda", "lsdi",
258 "lvp0", "lvp1", "sdb";
259 nvidia,tristate = <TEGRA_PIN_ENABLE>;
260 };
261 conf_ld17_0 {
262 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
263 "ld23_22";
264 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
Allen Martin0398dcb2013-01-16 13:12:24 +0000265 };
266 };
267 };
268
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300269 i2s@70002800 {
270 status = "okay";
271 };
272
Stephen Warren24bfee62012-05-21 10:04:37 +0000273 serial@70006000 {
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300274 status = "okay";
275 };
276
277 serial@70006200 {
278 status = "okay";
279 };
280
281 pwm: pwm@7000a000 {
282 status = "okay";
Stephen Warren24bfee62012-05-21 10:04:37 +0000283 };
284
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300285 lvds_ddc: i2c@7000c000 {
286 status = "okay";
287 clock-frequency = <400000>;
288
289 alc5632: alc5632@1e {
290 compatible = "realtek,alc5632";
291 reg = <0x1e>;
292 gpio-controller;
293 #gpio-cells = <2>;
294 };
295 };
296
297 hdmi_ddc: i2c@7000c400 {
298 status = "okay";
299 clock-frequency = <100000>;
300 };
301
Thierry Reding57595aa2023-07-10 11:22:18 +0200302 i2c@7000c500 {
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300303 compatible = "nvidia,nvec";
Thierry Reding57595aa2023-07-10 11:22:18 +0200304
305 /delete-property/ #address-cells;
306 /delete-property/ #size-cells;
307 /delete-property/ dmas;
308 /delete-property/ dma-names;
309
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300310 clock-frequency = <80000>;
311 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
312 slave-addr = <138>;
Thierry Reding57595aa2023-07-10 11:22:18 +0200313
314 status = "okay";
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300315 };
316
317 i2c@7000d000 {
318 status = "okay";
319 clock-frequency = <400000>;
320
321 pmic: tps6586x@34 {
322 compatible = "ti,tps6586x";
323 reg = <0x34>;
324 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
325
326 #gpio-cells = <2>;
327 gpio-controller;
328
329 sys-supply = <&p5valw_reg>;
330 vin-sm0-supply = <&sys_reg>;
331 vin-sm1-supply = <&sys_reg>;
332 vin-sm2-supply = <&sys_reg>;
333 vinldo01-supply = <&sm2_reg>;
334 vinldo23-supply = <&sm2_reg>;
335 vinldo4-supply = <&sm2_reg>;
336 vinldo678-supply = <&sm2_reg>;
337 vinldo9-supply = <&sm2_reg>;
338
339 regulators {
340 sys_reg: sys {
341 regulator-name = "vdd_sys";
342 regulator-always-on;
343 };
344
345 sm0 {
346 regulator-name = "+1.2vs_sm0,vdd_core";
347 regulator-min-microvolt = <1200000>;
348 regulator-max-microvolt = <1200000>;
349 regulator-always-on;
350 };
351
352 sm1 {
353 regulator-name = "+1.0vs_sm1,vdd_cpu";
354 regulator-min-microvolt = <1000000>;
355 regulator-max-microvolt = <1000000>;
356 regulator-always-on;
357 };
358
359 sm2_reg: sm2 {
360 regulator-name = "+3.7vs_sm2,vin_ldo*";
361 regulator-min-microvolt = <3700000>;
362 regulator-max-microvolt = <3700000>;
363 regulator-always-on;
364 };
365
366 /* LDO0 is not connected to anything */
367
368 ldo1 {
369 regulator-name = "+1.1vs_ldo1,avdd_pll*";
370 regulator-min-microvolt = <1100000>;
371 regulator-max-microvolt = <1100000>;
372 regulator-always-on;
373 };
374
375 ldo2 {
376 regulator-name = "+1.2vs_ldo2,vdd_rtc";
377 regulator-min-microvolt = <1200000>;
378 regulator-max-microvolt = <1200000>;
379 };
380
381 ldo3 {
382 regulator-name = "+3.3vs_ldo3,avdd_usb*";
383 regulator-min-microvolt = <3300000>;
384 regulator-max-microvolt = <3300000>;
385 regulator-always-on;
386 };
387
388 ldo4 {
389 regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
390 regulator-min-microvolt = <1800000>;
391 regulator-max-microvolt = <1800000>;
392 regulator-always-on;
393 };
394
395 ldo5 {
396 regulator-name = "+2.85vs_ldo5,vcore_mmc";
397 regulator-min-microvolt = <2850000>;
398 regulator-max-microvolt = <2850000>;
399 regulator-always-on;
400 };
401
402 ldo6 {
403 /*
404 * Research indicates this should be
405 * 1.8v; other boards that use this
406 * rail for the same purpose need it
407 * set to 1.8v. The schematic signal
408 * name is incorrect; perhaps copied
409 * from an incorrect NVIDIA reference.
410 */
411 regulator-name = "+2.85vs_ldo6,avdd_vdac";
412 regulator-min-microvolt = <1800000>;
413 regulator-max-microvolt = <1800000>;
414 };
415
416 hdmi_vdd_reg: ldo7 {
417 regulator-name = "+3.3vs_ldo7,avdd_hdmi";
418 regulator-min-microvolt = <3300000>;
419 regulator-max-microvolt = <3300000>;
420 };
421
422 hdmi_pll_reg: ldo8 {
423 regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
424 regulator-min-microvolt = <1800000>;
425 regulator-max-microvolt = <1800000>;
426 };
427
428 ldo9 {
429 regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
430 regulator-min-microvolt = <2850000>;
431 regulator-max-microvolt = <2850000>;
432 regulator-always-on;
433 };
434
435 ldo_rtc {
436 regulator-name = "+3.3vs_rtc";
437 regulator-min-microvolt = <3300000>;
438 regulator-max-microvolt = <3300000>;
439 regulator-always-on;
440 };
441 };
442 };
443
444 adt7461@4c {
445 compatible = "adi,adt7461";
446 reg = <0x4c>;
447 };
448 };
449
450 pmc@7000e400 {
451 nvidia,invert-interrupt;
452 nvidia,suspend-mode = <1>;
453 nvidia,cpu-pwr-good-time = <2000>;
454 nvidia,cpu-pwr-off-time = <0>;
455 nvidia,core-pwr-good-time = <3845 3845>;
456 nvidia,core-pwr-off-time = <0>;
457 nvidia,sys-clock-req-active-high;
458 };
459
460 usb@c5000000 {
461 status = "okay";
462 };
463
464 usb-phy@c5000000 {
465 status = "okay";
466 };
467
468 usb@c5004000 {
469 status = "okay";
470 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
471 GPIO_ACTIVE_LOW>;
472 };
473
474 usb-phy@c5004000 {
475 status = "okay";
476 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
477 GPIO_ACTIVE_LOW>;
478 };
479
Simon Glasse31a2a52016-01-30 16:37:52 -0700480 usb@c5008000 {
481 status = "okay";
Stephen Warren24bfee62012-05-21 10:04:37 +0000482 };
Marc Dietrichb81dfe12012-11-25 11:26:12 +0000483
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300484 usb-phy@c5008000 {
485 status = "okay";
486 };
487
Tom Warrened955272013-02-21 12:31:29 +0000488 sdhci@c8000000 {
489 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700490 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
491 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
492 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
Tom Warrened955272013-02-21 12:31:29 +0000493 bus-width = <4>;
494 };
495
496 sdhci@c8000600 {
497 status = "okay";
498 bus-width = <8>;
Tom Warren1c77f022016-09-13 10:45:42 -0600499 non-removable;
Tom Warrened955272013-02-21 12:31:29 +0000500 };
501
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300502 backlight: backlight {
503 compatible = "pwm-backlight";
504
505 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
506 power-supply = <&vdd_bl_reg>;
507 pwms = <&pwm 0 5000000>;
508
Svyatoslav Ryhel522633e2023-12-02 10:08:02 +0200509 brightness-levels = <1 35 70 105 140 175 210 255>;
510 default-brightness-level = <2>;
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300511
512 backlight-boot-off;
513 };
514
Simon Glasse31a2a52016-01-30 16:37:52 -0700515 clocks {
516 compatible = "simple-bus";
517 #address-cells = <1>;
518 #size-cells = <0>;
519
520 clk32k_in: clock@0 {
521 compatible = "fixed-clock";
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300522 reg = <0>;
Simon Glasse31a2a52016-01-30 16:37:52 -0700523 #clock-cells = <0>;
524 clock-frequency = <32768>;
525 };
526 };
527
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300528 gpio-keys {
529 compatible = "gpio-keys";
530
531 power {
532 label = "Power";
533 gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
534 linux,code = <KEY_POWER>;
535 wakeup-source;
536 };
Simon Glassd8af3c92016-01-30 16:38:01 -0700537 };
538
Misha Komarovskiy2ed0fc12016-12-11 22:28:12 +0300539 gpio-leds {
540 compatible = "gpio-leds";
541
542 wifi {
543 label = "wifi-led";
544 gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
545 linux,default-trigger = "rfkill0";
546 };
547 };
548
549 panel: panel {
550 compatible = "samsung,ltn101nt05", "simple-panel";
551
552 ddc-i2c-bus = <&lvds_ddc>;
553 power-supply = <&vdd_pnl_reg>;
554 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
555
556 backlight = <&backlight>;
557 };
558
559 regulators {
560 compatible = "simple-bus";
561 #address-cells = <1>;
562 #size-cells = <0>;
563
564 p5valw_reg: regulator@0 {
565 compatible = "regulator-fixed";
566 reg = <0>;
567 regulator-name = "+5valw";
568 regulator-min-microvolt = <5000000>;
569 regulator-max-microvolt = <5000000>;
570 regulator-always-on;
571 };
572
573 vdd_pnl_reg: regulator@1 {
574 compatible = "regulator-fixed";
575 reg = <1>;
576 regulator-name = "+3VS,vdd_pnl";
577 regulator-min-microvolt = <3300000>;
578 regulator-max-microvolt = <3300000>;
579 gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
580 enable-active-high;
581 };
582
583 vdd_bl_reg: regulator@2 {
584 compatible = "regulator-fixed";
585 reg = <2>;
586 regulator-name = "vdd_bl";
587 regulator-min-microvolt = <2800000>;
588 regulator-max-microvolt = <2800000>;
589 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
590 enable-active-high;
591 };
592 };
593
594 sound {
595 compatible = "nvidia,tegra-audio-alc5632-paz00",
596 "nvidia,tegra-audio-alc5632";
597
598 nvidia,model = "Compal PAZ00";
599
600 nvidia,audio-routing =
601 "Int Spk", "SPKOUT",
602 "Int Spk", "SPKOUTN",
603 "Headset Mic", "MICBIAS1",
604 "MIC1", "Headset Mic",
605 "Headset Stereophone", "HPR",
606 "Headset Stereophone", "HPL",
607 "DMICDAT", "Digital Mic";
608
609 nvidia,audio-codec = <&alc5632>;
610 nvidia,i2s-controller = <&tegra_i2s1>;
611 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
612 GPIO_ACTIVE_HIGH>;
613
614 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
615 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
616 <&tegra_car TEGRA20_CLK_CDEV1>;
617 clock-names = "pll_a", "pll_a_out0", "mclk";
Marc Dietrichb81dfe12012-11-25 11:26:12 +0000618 };
Stephen Warren24bfee62012-05-21 10:04:37 +0000619};