blob: fb2189d50dea6ee75fa1fa4573932fc154f13ee9 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Albert ARIBAUD6277b192013-02-25 00:58:58 +00002/*
3 * Copyright (c) 2004-2008 Texas Instruments
4 *
5 * (C) Copyright 2002
6 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Albert ARIBAUD6277b192013-02-25 00:58:58 +00007 */
8
9OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
10OUTPUT_ARCH(arm)
11ENTRY(_start)
12SECTIONS
13{
14 . = 0x00000000;
15
16 . = ALIGN(4);
17 .text :
18 {
19 __image_copy_start = .;
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020020 *(.vectors)
Albert ARIBAUD6277b192013-02-25 00:58:58 +000021 CPUDIR/start.o (.text*)
22 *(.text*)
Mans Rullgard6b2e26f2018-04-21 16:11:08 +010023 *(.glue*)
Albert ARIBAUD6277b192013-02-25 00:58:58 +000024 }
25
26 . = ALIGN(4);
27 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
28
29 . = ALIGN(4);
30 .data : {
31 *(.data*)
32 }
33
34 . = ALIGN(4);
Andrew Scull5a9095c2022-05-30 10:00:04 +000035 __u_boot_list : {
36 KEEP(*(SORT(__u_boot_list*)));
Simon Glass06f1c742015-06-23 15:38:30 -060037 }
38
Simon Glass3df10c02014-11-10 17:16:52 -070039 . = ALIGN(4);
Simon Glass01361a22017-11-13 18:55:02 -070040 .binman_sym_table : {
41 __binman_sym_start = .;
42 KEEP(*(SORT(.binman_sym*)));
43 __binman_sym_end = .;
44 }
45
46 . = ALIGN(4);
Albert ARIBAUD6277b192013-02-25 00:58:58 +000047
48 __image_copy_end = .;
49
50 .rel.dyn : {
51 __rel_dyn_start = .;
52 *(.rel*)
53 __rel_dyn_end = .;
54 }
55
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010056 .end :
57 {
58 *(.__end)
59 }
60
61 _image_binary_end = .;
Albert ARIBAUD6277b192013-02-25 00:58:58 +000062
Albert ARIBAUD6277b192013-02-25 00:58:58 +000063 .bss __rel_dyn_start (OVERLAY) : {
64 __bss_start = .;
65 *(.bss*)
66 . = ALIGN(4);
Tom Rini19aac972013-03-18 12:31:00 -040067 __bss_end = .;
Albert ARIBAUD6277b192013-02-25 00:58:58 +000068 }
Simon Glass89caf332015-06-23 15:38:29 -060069 __bss_size = __bss_end - __bss_start;
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010070 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +010071 .dynbss : { *(.dynbss) }
72 .dynstr : { *(.dynstr*) }
73 .dynamic : { *(.dynamic*) }
74 .hash : { *(.hash*) }
75 .plt : { *(.plt*) }
76 .interp : { *(.interp*) }
77 .gnu : { *(.gnu*) }
78 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUD6277b192013-02-25 00:58:58 +000079}
80
Tom Rini2aaa27d2019-01-22 17:09:26 -050081#if defined(IMAGE_MAX_SIZE)
Simon Goldschmidta76a4582019-04-25 21:22:39 +020082ASSERT(__image_copy_end - __image_copy_start <= (IMAGE_MAX_SIZE), \
Albert ARIBAUDe916e052013-04-12 05:14:30 +000083 "SPL image too big");
84#endif
85
86#if defined(CONFIG_SPL_BSS_MAX_SIZE)
Simon Goldschmidta76a4582019-04-25 21:22:39 +020087ASSERT(__bss_end - __bss_start <= (CONFIG_SPL_BSS_MAX_SIZE), \
Albert ARIBAUDe916e052013-04-12 05:14:30 +000088 "SPL image BSS too big");
89#endif
90
91#if defined(CONFIG_SPL_MAX_FOOTPRINT)
Simon Goldschmidta76a4582019-04-25 21:22:39 +020092ASSERT(__bss_end - _start <= (CONFIG_SPL_MAX_FOOTPRINT), \
Albert ARIBAUDe916e052013-04-12 05:14:30 +000093 "SPL image plus BSS too big");
Albert ARIBAUD6277b192013-02-25 00:58:58 +000094#endif