Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | |
| 3 | #ifndef __KONTRON_PITX_IMX8M_H |
| 4 | #define __KONTRON_PITX_IMX8M_H |
| 5 | |
| 6 | #include <linux/sizes.h> |
| 7 | #include <linux/stringify.h> |
| 8 | #include <asm/arch/imx-regs.h> |
| 9 | |
Sughosh Ganu | ccb3646 | 2022-04-15 11:29:34 +0530 | [diff] [blame] | 10 | /* GUID for capsule updatable firmware image */ |
| 11 | #define KONTRON_PITX_IMX8M_FIT_IMAGE_GUID \ |
| 12 | EFI_GUID(0xc898e959, 0x5b1f, 0x4e6d, 0x88, 0xe0, \ |
| 13 | 0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99) |
| 14 | |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 15 | #ifdef CONFIG_SPL_BUILD |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 16 | #define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000 |
| 17 | |
| 18 | /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ |
| 19 | #define CONFIG_MALLOC_F_ADDR 0x182000 |
| 20 | /* For RAW image gives a error info not panic */ |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 21 | |
| 22 | |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 23 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 |
| 24 | #endif |
| 25 | |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 26 | /* ENET1 Config */ |
| 27 | #if defined(CONFIG_CMD_NET) |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 28 | #define CONFIG_FEC_MXC_PHYADDR 0 |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 29 | |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 30 | #define PHY_ANEG_TIMEOUT 20000 |
| 31 | |
| 32 | #endif |
| 33 | |
| 34 | #define ENV_MEM_LAYOUT_SETTINGS \ |
Heiko Thiery | 6ad29f7 | 2022-02-16 13:25:15 +0100 | [diff] [blame] | 35 | "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
| 36 | "kernel_addr_r=0x42000000\0" \ |
| 37 | "fdt_addr_r=0x48000000\0" \ |
| 38 | "fdtoverlay_addr_r=0x49000000\0" \ |
| 39 | "ramdisk_addr_r=0x48080000\0" \ |
| 40 | "scriptaddr=0x40000000\0" \ |
| 41 | "pxefile_addr_r=0x40100000\0" |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 42 | |
| 43 | #define BOOT_TARGET_DEVICES(func) \ |
| 44 | func(MMC, mmc, 0) \ |
| 45 | func(MMC, mmc, 1) \ |
| 46 | func(USB, usb, 0) \ |
| 47 | func(DHCP, dhcp, na) \ |
| 48 | func(PXE, pxe, 0) |
| 49 | |
| 50 | #include <config_distro_bootcmd.h> |
| 51 | |
| 52 | /* Initial environment variables */ |
| 53 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 54 | "image=Image\0" \ |
| 55 | "console=ttymxc2,115200\0" \ |
| 56 | "boot_fdt=try\0" \ |
| 57 | "fdtfile=freescale/imx8mq-kontron-pitx-imx8m.dtb\0" \ |
| 58 | "dfu_alt_info=mmc 0=flash-bin raw 0x42 0x1000 mmcpart 1\0"\ |
| 59 | ENV_MEM_LAYOUT_SETTINGS \ |
| 60 | BOOTENV |
| 61 | |
| 62 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 63 | #define CFG_SYS_INIT_RAM_ADDR 0x40000000 |
| 64 | #define CFG_SYS_INIT_RAM_SIZE 0x80000 |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 65 | |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 66 | #define CFG_SYS_SDRAM_BASE 0x40000000 |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 67 | #define PHYS_SDRAM 0x40000000 |
| 68 | #define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */ |
| 69 | |
Marek Vasut | 86a2748 | 2022-04-24 23:44:03 +0200 | [diff] [blame] | 70 | #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 71 | |
Tom Rini | 376b88a | 2022-10-28 20:27:13 -0400 | [diff] [blame] | 72 | #define CFG_SYS_FSL_USDHC_NUM 2 |
| 73 | #define CFG_SYS_FSL_ESDHC_ADDR 0 |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 74 | |
Heiko Thiery | 05a3d95 | 2022-01-31 17:30:45 +0100 | [diff] [blame] | 75 | #endif |