| Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 1 | ----------------------------- |
| 2 | NAND boot on PPC440 platforms |
| 3 | ----------------------------- |
| 4 | |
| 5 | This document describes the U-Boot NAND boot feature as it |
| 6 | is implemented for the AMCC Sequoia (PPC440EPx) board. |
| 7 | |
| 8 | The PPC440EP(x)/GR(x) cpu's can boot directly from NAND FLASH, |
| 9 | completely without NOR FLASH. This can be done by using the NAND |
| 10 | boot feature of the 440 NAND flash controller (NDFC). |
| 11 | |
| 12 | Here a short desciption of the different boot stages: |
| 13 | |
| 14 | a) IPL (Initial Program Loader, integrated inside CPU) |
| 15 | ------------------------------------------------------ |
| 16 | Will load first 4k from NAND (SPL) into cache and execute it from there. |
| 17 | |
| 18 | b) SPL (Secondary Program Loader) |
| 19 | --------------------------------- |
| 20 | Will load special U-Boot version (NUB) from NAND and execute it. This SPL |
| 21 | has to fit into 4kByte. It sets up the CPU and configures the SDRAM |
| 22 | controller and the NAND controller so that the special U-Boot image can be |
| 23 | loaded from NAND to SDRAM. |
| 24 | This special image is build in the directory "nand_spl". |
| 25 | |
| 26 | c) NUB (NAND U-Boot) |
| 27 | -------------------- |
| 28 | This NAND U-Boot (NUB) is a special U-Boot version which can be started |
| 29 | from RAM. Therefore it mustn't (re-)configure the SDRAM controller. |
| 30 | |
| 31 | On 440EPx the SPL is copied to internal SRAM before the NAND controller |
| 32 | is set up. While still running from cache, I experienced problems accessing |
| 33 | the NAND controller. |
| 34 | |
| 35 | |
| Stefan Roese | a410848 | 2006-09-12 08:49:07 +0200 | [diff] [blame] | 36 | Example: Build and install NAND boot image for Sequoia (440EPx): |
| 37 | |
| 38 | a) Configure for sequoia with NAND boot support: |
| 39 | # make sequoia_nand_config |
| 40 | |
| 41 | b) Build image(s) |
| 42 | # make |
| 43 | |
| 44 | This will generate the SPL image in the "nand_spl" directory: |
| 45 | nand_spl/u-boot-spl.bin |
| 46 | Also another image is created spanning a whole NAND block (16kBytes): |
| 47 | nand_spl/u-boot-spl-16k.bin |
| 48 | The main NAND U-Boot image is generated in the toplevel directory: |
| 49 | u-boot.bin |
| 50 | A combined image of u-boot-spl-16k.bin and u-boot.bin is also created: |
| 51 | u-boot-nand.bin |
| 52 | |
| 53 | This image should be programmed at offset 0 in the NAND flash: |
| 54 | |
| 55 | # tftp 100000 /tftpboot/sequoia/u-boot-nand.bin |
| 56 | # nand erase 0 60000 |
| 57 | # nand write 100000 0 60000 |
| 58 | |
| 59 | |
| Stefan Roese | 42fbddd | 2006-09-07 11:51:23 +0200 | [diff] [blame] | 60 | September 07 2006, Stefan Roese <sr@denx.de> |