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Tom Warren41b68382011-01-27 10:58:05 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <ns16550.h>
Jimmy Zhanga308d462012-04-10 05:17:06 +000026#include <linux/compiler.h>
Tom Warren41b68382011-01-27 10:58:05 +000027#include <asm/io.h>
Simon Glass16134fd2011-08-30 06:23:13 +000028#include <asm/arch/clock.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000029#ifdef CONFIG_LCD
Simon Glass4f476f32012-10-17 13:24:52 +000030#include <asm/arch/display.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000031#endif
Lucas Stach04585842012-09-29 10:02:09 +000032#include <asm/arch/funcmux.h>
Tom Warren41b68382011-01-27 10:58:05 +000033#include <asm/arch/pinmux.h>
Simon Glasse772be82012-04-02 13:18:54 +000034#include <asm/arch/pmu.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000035#ifdef CONFIG_PWM_TEGRA
Simon Glass1564f342012-10-17 13:24:49 +000036#include <asm/arch/pwm.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000037#endif
Tom Warrenab371962012-09-19 15:50:56 -070038#include <asm/arch/tegra.h>
Tom Warrenab371962012-09-19 15:50:56 -070039#include <asm/arch-tegra/board.h>
40#include <asm/arch-tegra/clk_rst.h>
41#include <asm/arch-tegra/pmc.h>
42#include <asm/arch-tegra/sys_proto.h>
43#include <asm/arch-tegra/uart.h>
44#include <asm/arch-tegra/warmboot.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000045#ifdef CONFIG_TEGRA_CLOCK_SCALING
46#include <asm/arch/emc.h>
47#endif
48#ifdef CONFIG_USB_EHCI_TEGRA
Lucas Stach26c32162013-02-07 07:16:29 +000049#include <asm/arch-tegra/usb.h>
Jim Lin2fefb8b2013-06-21 19:05:47 +080050#include <asm/arch/usb.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000051#endif
Tom Warren9745cf82013-02-21 12:31:30 +000052#ifdef CONFIG_TEGRA_MMC
Tom Warrenf5d874d2013-02-26 12:26:55 -070053#include <asm/arch-tegra/tegra_mmc.h>
Tom Warren9745cf82013-02-21 12:31:30 +000054#include <asm/arch-tegra/mmc.h>
55#endif
Simon Glass87cc3d12012-02-03 15:13:57 +000056#include <i2c.h>
Tom Warrend32b2a42012-12-11 13:34:17 +000057#include <spi.h>
Jimmy Zhanga308d462012-04-10 05:17:06 +000058#include "emc.h"
Tom Warren41b68382011-01-27 10:58:05 +000059
60DECLARE_GLOBAL_DATA_PTR;
61
Tom Warren22562a42012-09-04 17:00:24 -070062const struct tegra_sysinfo sysinfo = {
63 CONFIG_TEGRA_BOARD_STRING
Tom Warren41b68382011-01-27 10:58:05 +000064};
65
Allen Martin74753a82012-08-31 08:30:08 +000066#ifndef CONFIG_SPL_BUILD
Tom Warren41b68382011-01-27 10:58:05 +000067/*
68 * Routine: timer_init
69 * Description: init the timestamp and lastinc value
70 */
71int timer_init(void)
72{
Tom Warren41b68382011-01-27 10:58:05 +000073 return 0;
74}
Allen Martin74753a82012-08-31 08:30:08 +000075#endif
Tom Warren41b68382011-01-27 10:58:05 +000076
Simon Glass5d73a8d2012-02-27 10:52:50 +000077void __pin_mux_usb(void)
78{
79}
80
81void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
82
Stephen Warrend2f67fe2012-06-12 08:33:40 +000083void __pin_mux_spi(void)
84{
85}
86
87void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
88
Lucas Stach18561f72012-09-25 20:21:14 +000089void __gpio_early_init_uart(void)
90{
91}
92
93void gpio_early_init_uart(void)
94__attribute__((weak, alias("__gpio_early_init_uart")));
95
Lucas Stach04585842012-09-29 10:02:09 +000096void __pin_mux_nand(void)
97{
98 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
99}
100
101void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
102
Marc Dietrich9bbe64b2012-11-25 11:26:11 +0000103void __pin_mux_display(void)
104{
105}
106
107void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
108
Tom Warren41b68382011-01-27 10:58:05 +0000109/*
Wei Ni39d45ed2012-04-02 13:18:58 +0000110 * Routine: power_det_init
111 * Description: turn off power detects
112 */
113static void power_det_init(void)
114{
Allen Martin55d98a12012-08-31 08:30:00 +0000115#if defined(CONFIG_TEGRA20)
Tom Warren22562a42012-09-04 17:00:24 -0700116 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
Wei Ni39d45ed2012-04-02 13:18:58 +0000117
118 /* turn off power detects */
119 writel(0, &pmc->pmc_pwr_det_latch);
120 writel(0, &pmc->pmc_pwr_det);
121#endif
122}
123
124/*
Tom Warren41b68382011-01-27 10:58:05 +0000125 * Routine: board_init
126 * Description: Early hardware init.
127 */
128int board_init(void)
129{
Jimmy Zhanga308d462012-04-10 05:17:06 +0000130 __maybe_unused int err;
131
Simon Glass704e60d2011-11-05 04:46:51 +0000132 /* Do clocks and UART first so that printf() works */
Simon Glassc2ea5e42011-09-21 12:40:04 +0000133 clock_init();
134 clock_verify();
135
Allen Martinb98691c2013-03-16 18:58:07 +0000136#ifdef CONFIG_FDT_SPI
Stephen Warrend2f67fe2012-06-12 08:33:40 +0000137 pin_mux_spi();
Tom Warrenee554f82011-11-05 09:48:11 +0000138 spi_init();
139#endif
Allen Martinba4fb9b2013-01-29 13:51:28 +0000140
Simon Glass1564f342012-10-17 13:24:49 +0000141#ifdef CONFIG_PWM_TEGRA
142 if (pwm_init(gd->fdt_blob))
143 debug("%s: Failed to init pwm\n", __func__);
144#endif
Simon Glass4f476f32012-10-17 13:24:52 +0000145#ifdef CONFIG_LCD
Marc Dietrich9bbe64b2012-11-25 11:26:11 +0000146 pin_mux_display();
Simon Glass4f476f32012-10-17 13:24:52 +0000147 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
148#endif
Tom Warren41b68382011-01-27 10:58:05 +0000149 /* boot param addr */
150 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
Wei Ni39d45ed2012-04-02 13:18:58 +0000151
152 power_det_init();
153
Simon Glass026fefb2012-10-30 07:28:53 +0000154#ifdef CONFIG_SYS_I2C_TEGRA
Simon Glass87cc3d12012-02-03 15:13:57 +0000155#ifndef CONFIG_SYS_I2C_INIT_BOARD
156#error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
157#endif
158 i2c_init_board();
Simon Glasse772be82012-04-02 13:18:54 +0000159# ifdef CONFIG_TEGRA_PMU
160 if (pmu_set_nominal())
161 debug("Failed to select nominal voltages\n");
Jimmy Zhanga308d462012-04-10 05:17:06 +0000162# ifdef CONFIG_TEGRA_CLOCK_SCALING
163 err = board_emc_init();
164 if (err)
165 debug("Memory controller init failed: %d\n", err);
166# endif
167# endif /* CONFIG_TEGRA_PMU */
Simon Glass026fefb2012-10-30 07:28:53 +0000168#endif /* CONFIG_SYS_I2C_TEGRA */
Tom Warren41b68382011-01-27 10:58:05 +0000169
Simon Glass5d73a8d2012-02-27 10:52:50 +0000170#ifdef CONFIG_USB_EHCI_TEGRA
171 pin_mux_usb();
172 board_usb_init(gd->fdt_blob);
173#endif
Simon Glass4f476f32012-10-17 13:24:52 +0000174#ifdef CONFIG_LCD
175 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
176#endif
Simon Glass5d73a8d2012-02-27 10:52:50 +0000177
Lucas Stach04585842012-09-29 10:02:09 +0000178#ifdef CONFIG_TEGRA_NAND
179 pin_mux_nand();
180#endif
181
Tom Warren22562a42012-09-04 17:00:24 -0700182#ifdef CONFIG_TEGRA_LP0
Allen Martin0ca1a452012-08-31 08:30:11 +0000183 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
184 warmboot_save_sdram_params();
185
Simon Glass8cc8f612012-04-02 13:18:57 +0000186 /* prepare the WB code to LP0 location */
187 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
188#endif
189
Tom Warren41b68382011-01-27 10:58:05 +0000190 return 0;
191}
Simon Glassdfcee792011-09-21 12:40:03 +0000192
193#ifdef CONFIG_BOARD_EARLY_INIT_F
Thierry Reding2fa4db02012-06-04 20:02:27 +0000194static void __gpio_early_init(void)
195{
196}
197
198void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
199
Simon Glassdfcee792011-09-21 12:40:03 +0000200int board_early_init_f(void)
201{
Tom Warren598547d2013-01-28 13:32:12 +0000202#if !defined(CONFIG_TEGRA20)
Tom Warrend32b2a42012-12-11 13:34:17 +0000203 pinmux_init();
204#endif
Simon Glassa8ccc8b2011-11-28 15:04:40 +0000205 board_init_uart_f();
Simon Glassdfcee792011-09-21 12:40:03 +0000206
207 /* Initialize periph GPIOs */
Thierry Reding2fa4db02012-06-04 20:02:27 +0000208 gpio_early_init();
Simon Glass704e60d2011-11-05 04:46:51 +0000209 gpio_early_init_uart();
Simon Glass4f476f32012-10-17 13:24:52 +0000210#ifdef CONFIG_LCD
211 tegra_lcd_early_init(gd->fdt_blob);
212#endif
Lucas Stach18561f72012-09-25 20:21:14 +0000213
Simon Glassdfcee792011-09-21 12:40:03 +0000214 return 0;
215}
216#endif /* EARLY_INIT */
Simon Glass4f476f32012-10-17 13:24:52 +0000217
218int board_late_init(void)
219{
220#ifdef CONFIG_LCD
221 /* Make sure we finish initing the LCD */
222 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
223#endif
224 return 0;
225}
Tom Warren9745cf82013-02-21 12:31:30 +0000226
227#if defined(CONFIG_TEGRA_MMC)
228void __pin_mux_mmc(void)
229{
230}
231
232void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
233
234/* this is a weak define that we are overriding */
235int board_mmc_init(bd_t *bd)
236{
237 debug("%s called\n", __func__);
238
239 /* Enable muxes, etc. for SDMMC controllers */
240 pin_mux_mmc();
241
242 debug("%s: init MMC\n", __func__);
243 tegra_mmc_init();
244
245 return 0;
246}
Tom Warrenf5d874d2013-02-26 12:26:55 -0700247
248void pad_init_mmc(struct mmc_host *host)
249{
250#if defined(CONFIG_TEGRA30)
251 enum periph_id id = host->mmc_id;
252 u32 val;
253
254 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
255 (unsigned int)host->reg, id);
256
257 /* Set the pad drive strength for SDMMC1 or 3 only */
258 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
259 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
260 __func__);
261 return;
262 }
263
264 val = readl(&host->reg->sdmemcmppadctl);
265 val &= 0xFFFFFFF0;
266 val |= MEMCOMP_PADCTRL_VREF;
267 writel(val, &host->reg->sdmemcmppadctl);
268
269 val = readl(&host->reg->autocalcfg);
270 val &= 0xFFFF0000;
271 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
272 writel(val, &host->reg->autocalcfg);
273#endif /* T30 */
274}
275#endif /* MMC */