blob: 318eb15c414ce2567da08bdb88deeb68c422914d [file] [log] [blame]
Andre Przywara8d65e613e2017-05-24 10:34:56 +01001/*
2 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#ifndef _DT_BINDINGS_CLK_SUN50I_A64_H_
44#define _DT_BINDINGS_CLK_SUN50I_A64_H_
45
Samuel Holland26bc4e72020-10-24 10:21:55 -050046#define CLK_PLL_VIDEO0 7
Jagan Tekiaab63ad2018-12-29 23:59:08 +053047#define CLK_PLL_PERIPH0 11
48
Samuel Holland26bc4e72020-10-24 10:21:55 -050049#define CLK_CPUX 21
Andre Przywara8d65e613e2017-05-24 10:34:56 +010050#define CLK_BUS_MIPI_DSI 28
51#define CLK_BUS_CE 29
52#define CLK_BUS_DMA 30
53#define CLK_BUS_MMC0 31
54#define CLK_BUS_MMC1 32
55#define CLK_BUS_MMC2 33
56#define CLK_BUS_NAND 34
57#define CLK_BUS_DRAM 35
58#define CLK_BUS_EMAC 36
59#define CLK_BUS_TS 37
60#define CLK_BUS_HSTIMER 38
61#define CLK_BUS_SPI0 39
62#define CLK_BUS_SPI1 40
63#define CLK_BUS_OTG 41
64#define CLK_BUS_EHCI0 42
65#define CLK_BUS_EHCI1 43
66#define CLK_BUS_OHCI0 44
67#define CLK_BUS_OHCI1 45
68#define CLK_BUS_VE 46
69#define CLK_BUS_TCON0 47
70#define CLK_BUS_TCON1 48
71#define CLK_BUS_DEINTERLACE 49
72#define CLK_BUS_CSI 50
73#define CLK_BUS_HDMI 51
74#define CLK_BUS_DE 52
75#define CLK_BUS_GPU 53
76#define CLK_BUS_MSGBOX 54
77#define CLK_BUS_SPINLOCK 55
78#define CLK_BUS_CODEC 56
79#define CLK_BUS_SPDIF 57
80#define CLK_BUS_PIO 58
81#define CLK_BUS_THS 59
82#define CLK_BUS_I2S0 60
83#define CLK_BUS_I2S1 61
84#define CLK_BUS_I2S2 62
85#define CLK_BUS_I2C0 63
86#define CLK_BUS_I2C1 64
87#define CLK_BUS_I2C2 65
88#define CLK_BUS_SCR 66
89#define CLK_BUS_UART0 67
90#define CLK_BUS_UART1 68
91#define CLK_BUS_UART2 69
92#define CLK_BUS_UART3 70
93#define CLK_BUS_UART4 71
94#define CLK_BUS_DBG 72
95#define CLK_THS 73
96#define CLK_NAND 74
97#define CLK_MMC0 75
98#define CLK_MMC1 76
99#define CLK_MMC2 77
100#define CLK_TS 78
101#define CLK_CE 79
102#define CLK_SPI0 80
103#define CLK_SPI1 81
104#define CLK_I2S0 82
105#define CLK_I2S1 83
106#define CLK_I2S2 84
107#define CLK_SPDIF 85
108#define CLK_USB_PHY0 86
109#define CLK_USB_PHY1 87
110#define CLK_USB_HSIC 88
111#define CLK_USB_HSIC_12M 89
112
113#define CLK_USB_OHCI0 91
114
115#define CLK_USB_OHCI1 93
116
117#define CLK_DRAM_VE 95
118#define CLK_DRAM_CSI 96
119#define CLK_DRAM_DEINTERLACE 97
120#define CLK_DRAM_TS 98
121#define CLK_DE 99
122#define CLK_TCON0 100
123#define CLK_TCON1 101
124#define CLK_DEINTERLACE 102
125#define CLK_CSI_MISC 103
126#define CLK_CSI_SCLK 104
127#define CLK_CSI_MCLK 105
128#define CLK_VE 106
129#define CLK_AC_DIG 107
130#define CLK_AC_DIG_4X 108
131#define CLK_AVS 109
132#define CLK_HDMI 110
133#define CLK_HDMI_DDC 111
Samuel Holland26bc4e72020-10-24 10:21:55 -0500134#define CLK_MBUS 112
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100135#define CLK_DSI_DPHY 113
136#define CLK_GPU 114
137
138#endif /* _DT_BINDINGS_CLK_SUN50I_H_ */