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wdenk0157ced2002-10-21 17:04:47 +00001/*
Wolfgang Denkf710efd2010-07-24 20:22:02 +02002 * (C) Copyright 2002-2010
wdenk0157ced2002-10-21 17:04:47 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk0157ced2002-10-21 17:04:47 +00006 */
7
8#ifndef __ASM_GBL_DATA_H
9#define __ASM_GBL_DATA_H
Simon Glass3ac47d72012-12-13 20:48:30 +000010
11/* Architecture-specific global data */
12struct arch_global_data {
Simon Glass9e247d12012-12-13 20:49:05 +000013#if defined(CONFIG_FSL_ESDHC)
14 u32 sdhc_clk;
15#endif
Zhao Qiang5ad93952014-09-25 13:52:25 +080016
17#if defined(CONFIG_U_QE)
18 u32 qe_clk;
19 u32 brg_clk;
20 uint mp_alloc_base;
21 uint mp_alloc_top;
22#endif /* CONFIG_U_QE */
23
Simon Glasse61accc2012-12-13 20:48:31 +000024#ifdef CONFIG_AT91FAMILY
25 /* "static data" needed by at91's clock.c */
26 unsigned long cpu_clk_rate_hz;
27 unsigned long main_clk_rate_hz;
28 unsigned long mck_rate_hz;
29 unsigned long plla_rate_hz;
30 unsigned long pllb_rate_hz;
31 unsigned long at91_pllb_usb_init;
32#endif
Simon Glass6ed6e032012-12-13 20:48:32 +000033 /* "static data" needed by most of timer.c on ARM platforms */
34 unsigned long timer_rate_hz;
Simon Glass8ca15202012-12-13 20:48:33 +000035 unsigned long tbu;
Simon Glass2655ee12012-12-13 20:48:34 +000036 unsigned long tbl;
Simon Glassa848da52012-12-13 20:48:35 +000037 unsigned long lastinc;
Simon Glass9cbe003a2012-12-13 20:48:36 +000038 unsigned long long timer_reset_value;
Simon Glass6b4ee152012-12-13 20:48:39 +000039#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
40 unsigned long tlb_addr;
Alexander Grafe317fe82016-03-04 01:09:47 +010041 unsigned long tlb_size;
Alexander Grafce0a64e2016-03-04 01:09:54 +010042#if defined(CONFIG_ARM64)
Alexander Grafe317fe82016-03-04 01:09:47 +010043 unsigned long tlb_fillptr;
44 unsigned long tlb_emerg;
Sergey Temerkhanov78eaa492015-10-14 09:55:45 -070045#endif
Simon Glass6b4ee152012-12-13 20:48:39 +000046#endif
York Sun1ef95cc2016-06-24 16:46:18 -070047#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
48#define MEM_RESERVE_SECURE_SECURED 0x1
49#define MEM_RESERVE_SECURE_MAINTAINED 0x2
50#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
51 /*
52 * Secure memory addr
53 * This variable needs maintenance if the RAM base is not zero,
54 * or if RAM splits into non-consecutive banks. It also has a
55 * flag indicating the secure memory is marked as secure by MMU.
56 * Flags used: 0x1 secured
57 * 0x2 maintained
58 */
59 phys_addr_t secure_ram;
York Sunf84f81e2016-06-24 16:46:19 -070060 unsigned long tlb_allocated;
York Sun1ef95cc2016-06-24 16:46:18 -070061#endif
SRICHARAN R4af19882013-04-24 00:41:23 +000062
Tom Rini70b3e342016-11-07 21:34:55 -050063#ifdef CONFIG_ARCH_OMAP2
Paul Kocialkowskid5b76242015-07-15 16:02:19 +020064 u32 omap_boot_device;
65 u32 omap_boot_mode;
66 u8 omap_ch_flags;
SRICHARAN R4af19882013-04-24 00:41:23 +000067#endif
Prabhakar Kushwaha122bcfd2015-11-09 16:42:07 +053068#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
York Sun1ecab782015-01-06 13:18:49 -080069 unsigned long mem2_clk;
70#endif
Simon Glass3ac47d72012-12-13 20:48:30 +000071};
72
Simon Glass6878cd12012-12-13 20:49:14 +000073#include <asm-generic/global_data.h>
wdenk0157ced2002-10-21 17:04:47 +000074
Jeroen Hofstee43614d12014-07-30 21:54:52 +020075#ifdef __clang__
76
77#define DECLARE_GLOBAL_DATA_PTR
78#define gd get_gd()
79
80static inline gd_t *get_gd(void)
81{
82 gd_t *gd_ptr;
83
84#ifdef CONFIG_ARM64
85 /*
86 * Make will already error that reserving x18 is not supported at the
87 * time of writing, clang: error: unknown argument: '-ffixed-x18'
88 */
89 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
90#else
91 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
92#endif
93
94 return gd_ptr;
95}
96
97#else
98
David Feng85fd5f12013-12-14 11:47:35 +080099#ifdef CONFIG_ARM64
100#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
101#else
102#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
103#endif
Jeroen Hofstee43614d12014-07-30 21:54:52 +0200104#endif
wdenk0157ced2002-10-21 17:04:47 +0000105
106#endif /* __ASM_GBL_DATA_H */