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git01.mediatek.com / filogic / uboot / 0238468f5834b165314d5b3a23f7cac652ae0405 / . / board / ip860 / u-boot.lds.debug
blob: 2f61b11d8125768b820c09775313988e75b87974 [file] [log] [blame]
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]25/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 /* Read-only sections, merged into text segment: */
30 . = + SIZEOF_HEADERS;
31 .interp : { *(.interp) }
32 .hash : { *(.hash) }
33 .dynsym : { *(.dynsym) }
34 .dynstr : { *(.dynstr) }
35 .rel.text : { *(.rel.text) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]36 .rela.text : { *(.rela.text) }
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]37 .rel.data : { *(.rel.data) }
Wolfgang Denka1be4762008-05-20 16:00:29 +0200[diff] [blame]38 .rela.data : { *(.rela.data) }
39 .rel.rodata : { *(.rel.rodata) }
40 .rela.rodata : { *(.rela.rodata) }
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]41 .rel.got : { *(.rel.got) }
42 .rela.got : { *(.rela.got) }
43 .rel.ctors : { *(.rel.ctors) }
44 .rela.ctors : { *(.rela.ctors) }
45 .rel.dtors : { *(.rel.dtors) }
46 .rela.dtors : { *(.rela.dtors) }
47 .rel.bss : { *(.rel.bss) }
48 .rela.bss : { *(.rela.bss) }
49 .rel.plt : { *(.rel.plt) }
50 .rela.plt : { *(.rela.plt) }
51 .init : { *(.init) }
52 .plt : { *(.plt) }
53 .text :
54 {
55 /* WARNING - the following is hand-optimized to fit within */
56 /* the sector layout of our flash chips! XXX FIXME XXX */
57
Stefan Roese88fbf932010-04-15 16:07:28 +0200[diff] [blame]58 arch/powerpc/cpu/mpc8xx/start.o (.text)
59 arch/powerpc/lib/ppcstring.o (.text)
60 arch/powerpc/cpu/mpc8xx/interrupts.o (.text)
61 arch/powerpc/lib/time.o (.text)
62 arch/powerpc/lib/ticks.o (.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]63/**
64 . = env_offset;
Jean-Christophe PLAGNIOL-VILLARD4436c1e2008-09-10 22:48:01 +0200[diff] [blame]65 common/env_embedded.o(.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]66**/
67 *(.text)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]68 *(.got1)
69 }
70 _etext = .;
71 PROVIDE (etext = .);
72 .rodata :
73 {
74 *(.rodata)
75 *(.rodata1)
Wolfgang Denkaaa7c002005-12-12 16:06:05 +0100[diff] [blame]76 *(.rodata.str1.4)
77 *(.eh_frame)
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]78 }
79 .fini : { *(.fini) } =0
80 .ctors : { *(.ctors) }
81 .dtors : { *(.dtors) }
82
83 /* Read-write section, merged into data segment: */
84 . = (. + 0x0FFF) & 0xFFFFF000;
85 _erotext = .;
86 PROVIDE (erotext = .);
87 .reloc :
88 {
89 *(.got)
90 _GOT2_TABLE_ = .;
91 *(.got2)
92 _FIXUP_TABLE_ = .;
93 *(.fixup)
94 }
95 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
96 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
97
98 .data :
99 {
100 *(.data)
101 *(.data1)
102 *(.sdata)
103 *(.sdata2)
104 *(.dynamic)
105 CONSTRUCTORS
106 }
107 _edata = .;
108 PROVIDE (edata = .);
109
wdenk57b2d802003-06-27 21:31:46 +0000[diff] [blame]110 __u_boot_cmd_start = .;
111 .u_boot_cmd : { *(.u_boot_cmd) }
112 __u_boot_cmd_end = .;
113
114
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]115 __start___ex_table = .;
116 __ex_table : { *(__ex_table) }
117 __stop___ex_table = .;
118
119 . = ALIGN(4096);
120 __init_begin = .;
121 .text.init : { *(.text.init) }
122 .data.init : { *(.data.init) }
123 . = ALIGN(4096);
124 __init_end = .;
125
126 __bss_start = .;
127 .bss :
128 {
129 *(.sbss) *(.scommon)
130 *(.dynbss)
131 *(.bss)
132 *(COMMON)
133 }
Po-Yu Chuangcedbf4b2011-03-01 22:59:59 +0000[diff] [blame]134 __bss_end__ = . ;
wdenkefee1702002-07-20 20:14:13 +0000[diff] [blame]135 PROVIDE (end = .);
136}