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Daniel Hellstromce43fed2008-03-28 10:06:52 +01001/* Configuration header file for LEON3 GRSIM, trying to be similar
2 * to Gaisler's GR-XC3S-1500 board.
3 *
4 * (C) Copyright 2003-2005
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2007
8 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
9 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020010 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstromce43fed2008-03-28 10:06:52 +010011 */
12
13#ifndef __CONFIG_H__
14#define __CONFIG_H__
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 *
20 * Select between TSIM or GRSIM by setting CONFIG_GRSIM or CONFIG_TSIM to 1.
21 *
22 * TSIM command
23 * tsim-leon3 -sdram 0 -ram 32000 -rom 8192 -mmu
24 *
25 */
26
Daniel Hellstromce43fed2008-03-28 10:06:52 +010027#define CONFIG_GRSIM 0 /* ... not running on GRSIM */
28#define CONFIG_TSIM 1 /* ... running on TSIM */
29
30/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020031#define CONFIG_SYS_CLK_FREQ 40000000 /* 40MHz */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010032
33/* Number of SPARC register windows */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020034#define CONFIG_SYS_SPARC_NWINDOWS 8
Daniel Hellstromce43fed2008-03-28 10:06:52 +010035
36/*
37 * Serial console configuration
38 */
39#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020040#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstromce43fed2008-03-28 10:06:52 +010041
42/* Partitions */
43#define CONFIG_DOS_PARTITION
44#define CONFIG_MAC_PARTITION
45#define CONFIG_ISO_PARTITION
46
47/*
48 * Supported commands
49 */
Wolfgang Denk85c25df2009-04-01 23:34:12 +020050#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */
51#define CONFIG_CMD_BDI /* bdinfo */
52#define CONFIG_CMD_CONSOLE /* coninfo */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010053#define CONFIG_CMD_DIAG
Wolfgang Denk85c25df2009-04-01 23:34:12 +020054#define CONFIG_CMD_ECHO /* echo arguments */
55#define CONFIG_CMD_FPGA /* FPGA configuration Support */
Siva Durga Prasad Paladuguadc11de2014-03-14 16:35:38 +053056#define CONFIG_CMD_FPGA_LOADMK
Daniel Hellstromce43fed2008-03-28 10:06:52 +010057#define CONFIG_CMD_IRQ
Wolfgang Denk85c25df2009-04-01 23:34:12 +020058#define CONFIG_CMD_ITEST /* Integer (and string) test */
59#define CONFIG_CMD_LOADB /* loadb */
60#define CONFIG_CMD_LOADS /* loads */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010061#define CONFIG_CMD_MISC /* Misc functions like sleep etc */
Wolfgang Denk85c25df2009-04-01 23:34:12 +020062#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010063#define CONFIG_CMD_REGINFO
Wolfgang Denk85c25df2009-04-01 23:34:12 +020064#define CONFIG_CMD_RUN /* run command in env variable */
65#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
66#define CONFIG_CMD_SOURCE /* "source" command support */
67#define CONFIG_CMD_XIMG /* Load part of Multi Image */
Daniel Hellstromce43fed2008-03-28 10:06:52 +010068
69/*
70 * Autobooting
71 */
72#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
73
74#define CONFIG_PREBOOT "echo;" \
75 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
76 "echo"
77
78#undef CONFIG_BOOTARGS
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020079/*#define CONFIG_SYS_HUSH_PARSER 0*/
Daniel Hellstromce43fed2008-03-28 10:06:52 +010080
81#define CONFIG_EXTRA_ENV_SETTINGS \
82 "netdev=eth0\0" \
83 "nfsargs=setenv bootargs root=/dev/nfs rw " \
84 "nfsroot=${serverip}:${rootpath}\0" \
85 "ramargs=setenv bootargs root=/dev/ram rw\0" \
86 "addip=setenv bootargs ${bootargs} " \
87 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
88 ":${hostname}:${netdev}:off panic=1\0" \
89 "flash_nfs=run nfsargs addip;" \
90 "bootm ${kernel_addr}\0" \
91 "flash_self=run ramargs addip;" \
92 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
93 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
94 "rootpath=/export/roofs\0" \
95 "scratch=40000000\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +000096 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstromce43fed2008-03-28 10:06:52 +010097 "ethaddr=00:00:7A:CC:00:12\0" \
98 "bootargs=console=ttyS0,38400" \
99 ""
100#define CONFIG_NETMASK 255.255.255.0
101#define CONFIG_GATEWAYIP 192.168.0.1
102#define CONFIG_SERVERIP 192.168.0.81
103#define CONFIG_IPADDR 192.168.0.80
Joe Hershberger257ff782011-10-13 13:03:47 +0000104#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100105#define CONFIG_HOSTNAME grxc3s1500
Joe Hershbergere4da2482011-10-13 13:03:48 +0000106#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100107
108#define CONFIG_BOOTCOMMAND "run flash_self"
109
110/* Memory MAP
111 *
112 * Flash:
113 * |--------------------------------|
114 * | 0x00000000 Text & Data & BSS | *
115 * | for Monitor | *
116 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
117 * | UNUSED / Growth | * 256kb
118 * |--------------------------------|
119 * | 0x00050000 Base custom area | *
120 * | kernel / FS | *
121 * | | * Rest of Flash
122 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
123 * | END-0x00008000 Environment | * 32kb
124 * |--------------------------------|
125 *
126 *
127 *
128 * Main Memory:
129 * |--------------------------------|
130 * | UNUSED / scratch area |
131 * | |
132 * | |
133 * | |
134 * | |
135 * |--------------------------------|
136 * | Monitor .Text / .DATA / .BSS | * 256kb
137 * | Relocated! | *
138 * |--------------------------------|
139 * | Monitor Malloc | * 128kb (contains relocated environment)
140 * |--------------------------------|
141 * | Monitor/kernel STACK | * 64kb
142 * |--------------------------------|
143 * | Page Table for MMU systems | * 2k
144 * |--------------------------------|
145 * | PROM Code accessed from Linux | * 6kb-128b
146 * |--------------------------------|
147 * | Global data (avail from kernel)| * 128b
148 * |--------------------------------|
149 *
150 */
151
152/*
153 * Flash configuration (8,16 or 32 MB)
154 * TEXT base always at 0xFFF00000
155 * ENV_ADDR always at 0xFFF40000
156 * FLASH_BASE at 0xFC000000 for 64 MB
157 * 0xFE000000 for 32 MB
158 * 0xFF000000 for 16 MB
159 * 0xFF800000 for 8 MB
160 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200161#define CONFIG_SYS_NO_FLASH 1
162#define CONFIG_SYS_FLASH_BASE 0x00000000
163#define CONFIG_SYS_FLASH_SIZE 0x00800000
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200164#define CONFIG_ENV_SIZE 0x8000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100165
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200166#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100167
168#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200169#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
170#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100171
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
173#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
174#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
175#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100176
177#ifdef ENABLE_FLASH_SUPPORT
178/* For use with grsim FLASH emulation extension */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100180
181#undef CONFIG_FLASH_8BIT /* Flash is 32-bit */
182
183/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200184#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200185#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_FLASH_CFI
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100187#endif
188
189/*
190 * Environment settings
191 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200192#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200193/*#define CONFIG_ENV_IS_IN_FLASH*/
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200194/*#define CONFIG_ENV_SIZE 0x8000*/
195#define CONFIG_ENV_SECT_SIZE 0x40000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100196#define CONFIG_ENV_OVERWRITE 1
197
198/*
199 * Memory map
200 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200201#define CONFIG_SYS_SDRAM_BASE 0x40000000
202#define CONFIG_SYS_SDRAM_SIZE 0x02000000
203#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100204
205/* no SRAM available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#undef CONFIG_SYS_SRAM_BASE
207#undef CONFIG_SYS_SRAM_SIZE
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100208
209/* Always Run U-Boot from SDRAM */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200210#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
211#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
212#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100213
Wolfgang Denk0191e472010-10-26 14:34:52 +0200214#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100215
Wolfgang Denk0191e472010-10-26 14:34:52 +0200216#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200217#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100218
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
220#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100221
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200222#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200223#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
224# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100225#endif
226
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200227#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
228#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
229#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100230
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
232#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100233
234/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
236#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100237
238/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200239#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100240
241/*
242 * Ethernet configuration
243 */
244#define CONFIG_GRETH 1
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100245
246/* Default HARDWARE address */
247#define GRETH_HWADDR_0 0x00
248#define GRETH_HWADDR_1 0x00
249#define GRETH_HWADDR_2 0x7A
250#define GRETH_HWADDR_3 0xcc
251#define GRETH_HWADDR_4 0x00
252#define GRETH_HWADDR_5 0x12
253
254#define CONFIG_ETHADDR 00:00:7a:cc:00:12
255
256/*
257 * Define CONFIG_GRETH_10MBIT to force GRETH at 10Mb/s
258 */
259/* #define CONFIG_GRETH_10MBIT 1 */
260#define CONFIG_PHY_ADDR 0x00
261
262/*
263 * Miscellaneous configurable options
264 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200265#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100266#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200267#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100268#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200269#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100270#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200271#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
272#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
273#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100274
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200275#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
276#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100277
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200278#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100279
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100280/***** Gaisler GRLIB IP-Cores Config ********/
281
282/* AMBA Plug & Play info display on startup */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200283/*#define CONFIG_SYS_AMBAPP_PRINT_ON_STARTUP*/
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100284
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200285#define CONFIG_SYS_GRLIB_SDRAM 0
286#define CONFIG_SYS_GRLIB_MEMCFG1 (0x000000ff | (1<<11))
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100287#if CONFIG_GRSIM
288/* GRSIM configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200289#define CONFIG_SYS_GRLIB_MEMCFG2 0x82206000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100290#else
291/* TSIM configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200292#define CONFIG_SYS_GRLIB_MEMCFG2 0x00001820
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100293#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200294#define CONFIG_SYS_GRLIB_MEMCFG3 0x00136000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100295
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200296#define CONFIG_SYS_GRLIB_FT_MEMCFG1 (0x000000ff | (1<<11))
297#define CONFIG_SYS_GRLIB_FT_MEMCFG2 0x82206000
298#define CONFIG_SYS_GRLIB_FT_MEMCFG3 0x00136000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100299
300/* no DDR controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200301#define CONFIG_SYS_GRLIB_DDR_CFG 0x00000000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100302
303/* no DDR2 Controller */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200304#define CONFIG_SYS_GRLIB_DDR2_CFG1 0x00000000
305#define CONFIG_SYS_GRLIB_DDR2_CFG3 0x00000000
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100306
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200307#define CONFIG_SYS_GRLIB_APBUART_SCALER \
Daniel Hellstromce43fed2008-03-28 10:06:52 +0100308 ((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
309
310/* default kernel command line */
311#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
312
313#define CONFIG_IDENT_STRING "Gaisler GRSIM"
314
315#endif /* __CONFIG_H */