blob: c2113439c30236225ad28743fa0467f93cf537a8 [file] [log] [blame]
Peng Fanaeb9c062018-11-20 10:20:00 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_EVK_H
7#define __IMX8M_EVK_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
12#ifdef CONFIG_SECURE_BOOT
13#define CONFIG_CSF_SIZE 0x2000 /* 8K region */
14#endif
15
Peng Fanaeb9c062018-11-20 10:20:00 +000016#define CONFIG_SPL_MAX_SIZE (124 * 1024)
17#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
18#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
19#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
20#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
21
22#ifdef CONFIG_SPL_BUILD
23/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
24#define CONFIG_SPL_WATCHDOG_SUPPORT
25#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
26#define CONFIG_SPL_POWER_SUPPORT
27#define CONFIG_SPL_I2C_SUPPORT
28#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
29#define CONFIG_SPL_STACK 0x187FF0
30#define CONFIG_SPL_LIBCOMMON_SUPPORT
31#define CONFIG_SPL_LIBGENERIC_SUPPORT
32#define CONFIG_SPL_GPIO_SUPPORT
33#define CONFIG_SPL_MMC_SUPPORT
34#define CONFIG_SPL_BSS_START_ADDR 0x00180000
35#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
36#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
37#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
38#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
Peng Fanaeb9c062018-11-20 10:20:00 +000039
40/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
41#define CONFIG_MALLOC_F_ADDR 0x182000
42/* For RAW image gives a error info not panic */
43#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
44
45#undef CONFIG_DM_MMC
46#undef CONFIG_DM_PMIC
47#undef CONFIG_DM_PMIC_PFUZE100
48
49#define CONFIG_SYS_I2C
50#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
51#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
52#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
53
54#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
55
56#define CONFIG_POWER
57#define CONFIG_POWER_I2C
58#define CONFIG_POWER_PFUZE100
59#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
60#endif
61
62#define CONFIG_REMAKE_ELF
63
64#define CONFIG_BOARD_EARLY_INIT_F
65#define CONFIG_BOARD_LATE_INIT
66
67#undef CONFIG_CMD_EXPORTENV
68#undef CONFIG_CMD_IMPORTENV
69#undef CONFIG_CMD_IMLS
70
71#undef CONFIG_CMD_CRC32
72#undef CONFIG_BOOTM_NETBSD
73
74/* ENET Config */
75/* ENET1 */
76#if defined(CONFIG_CMD_NET)
77#define CONFIG_CMD_PING
78#define CONFIG_CMD_DHCP
79#define CONFIG_CMD_MII
80#define CONFIG_MII
81#define CONFIG_ETHPRIME "FEC"
82
83#define CONFIG_FEC_MXC
84#define CONFIG_FEC_XCV_TYPE RGMII
85#define CONFIG_FEC_MXC_PHYADDR 0
86#define FEC_QUIRK_ENET_MAC
87
88#define CONFIG_PHY_GIGE
89#define IMX_FEC_BASE 0x30BE0000
90
91#define CONFIG_PHYLIB
92#define CONFIG_PHY_ATHEROS
93#endif
94
95#define CONFIG_MFG_ENV_SETTINGS \
96 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
97 "rdinit=/linuxrc " \
98 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
99 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
100 "g_mass_storage.iSerialNumber=\"\" "\
101 "clk_ignore_unused "\
102 "\0" \
103 "initrd_addr=0x43800000\0" \
104 "initrd_high=0xffffffff\0" \
105 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
106/* Initial environment variables */
107#define CONFIG_EXTRA_ENV_SETTINGS \
108 CONFIG_MFG_ENV_SETTINGS \
109 "script=boot.scr\0" \
110 "image=Image\0" \
111 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \
112 "fdt_addr=0x43000000\0" \
113 "fdt_high=0xffffffffffffffff\0" \
114 "boot_fdt=try\0" \
115 "fdt_file=fsl-imx8mq-evk.dtb\0" \
116 "initrd_addr=0x43800000\0" \
117 "initrd_high=0xffffffffffffffff\0" \
118 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
119 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
120 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
121 "mmcautodetect=yes\0" \
122 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
123 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
124 "bootscript=echo Running bootscript from mmc ...; " \
125 "source\0" \
126 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
127 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
128 "mmcboot=echo Booting from mmc ...; " \
129 "run mmcargs; " \
130 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
131 "if run loadfdt; then " \
132 "booti ${loadaddr} - ${fdt_addr}; " \
133 "else " \
134 "echo WARN: Cannot load the DT; " \
135 "fi; " \
136 "else " \
137 "echo wait for boot; " \
138 "fi;\0" \
139 "netargs=setenv bootargs console=${console} " \
140 "root=/dev/nfs " \
141 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
142 "netboot=echo Booting from net ...; " \
143 "run netargs; " \
144 "if test ${ip_dyn} = yes; then " \
145 "setenv get_cmd dhcp; " \
146 "else " \
147 "setenv get_cmd tftp; " \
148 "fi; " \
149 "${get_cmd} ${loadaddr} ${image}; " \
150 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
151 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
152 "booti ${loadaddr} - ${fdt_addr}; " \
153 "else " \
154 "echo WARN: Cannot load the DT; " \
155 "fi; " \
156 "else " \
157 "booti; " \
158 "fi;\0"
159
160#define CONFIG_BOOTCOMMAND \
161 "mmc dev ${mmcdev}; if mmc rescan; then " \
162 "if run loadbootscript; then " \
163 "run bootscript; " \
164 "else " \
165 "if run loadimage; then " \
166 "run mmcboot; " \
167 "else run netboot; " \
168 "fi; " \
169 "fi; " \
170 "else booti ${loadaddr} - ${fdt_addr}; fi"
171
172/* Link Definitions */
173#define CONFIG_LOADADDR 0x40480000
174
175#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
176
177#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
178#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
179#define CONFIG_SYS_INIT_SP_OFFSET \
180 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
181#define CONFIG_SYS_INIT_SP_ADDR \
182 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
183
184#define CONFIG_ENV_OVERWRITE
185#define CONFIG_ENV_OFFSET (64 * SZ_64K)
186#define CONFIG_ENV_SIZE 0x1000
Peng Fanaeb9c062018-11-20 10:20:00 +0000187#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
188#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
189
190/* Size of malloc() pool */
191#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
192
193#define CONFIG_SYS_SDRAM_BASE 0x40000000
194#define PHYS_SDRAM 0x40000000
195#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
196
197#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
198#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
199 (PHYS_SDRAM_SIZE >> 1))
200
201#define CONFIG_BAUDRATE 115200
202
203#define CONFIG_MXC_UART
204#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
205
206/* Monitor Command Prompt */
207#undef CONFIG_SYS_PROMPT
208#define CONFIG_SYS_PROMPT "u-boot=> "
209#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
210#define CONFIG_SYS_CBSIZE 1024
211#define CONFIG_SYS_MAXARGS 64
212#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
213#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
214 sizeof(CONFIG_SYS_PROMPT) + 16)
215
216#define CONFIG_IMX_BOOTAUX
217
218#define CONFIG_CMD_MMC
Peng Fanaeb9c062018-11-20 10:20:00 +0000219
220#define CONFIG_SYS_FSL_USDHC_NUM 2
221#define CONFIG_SYS_FSL_ESDHC_ADDR 0
222
Peng Fanaeb9c062018-11-20 10:20:00 +0000223#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
224
225#define CONFIG_MXC_GPIO
226
Peng Fanaeb9c062018-11-20 10:20:00 +0000227#define CONFIG_CMD_FUSE
228
229/* I2C Configs */
230#define CONFIG_SYS_I2C_SPEED 100000
231
232#define CONFIG_OF_SYSTEM_SETUP
233
234#ifndef CONFIG_SPL_BUILD
235#define CONFIG_DM_PMIC
236#endif
237
238#endif