blob: cee2328ab1eadf81896feaa9f89f816710c2b704 [file] [log] [blame]
Paul Burton96c68472018-12-16 19:25:22 -03001// SPDX-License-Identifier: GPL-2.0+
2
3#include <config.h>
4#include <common.h>
5#include <asm/io.h>
6#include <mach/jz4780.h>
7
8int jz47xx_gpio_get_value(unsigned int gpio)
9{
10 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
11 int port = gpio / 32;
12 int pin = gpio % 32;
13
14 return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin);
15}
16
17void jz47xx_gpio_direction_input(unsigned int gpio)
18{
19 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
20 int port = gpio / 32;
21 int pin = gpio % 32;
22
23 writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
24 writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
25 writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port));
26}
27
28void jz47xx_gpio_direction_output(unsigned int gpio, int value)
29{
30 void __iomem *gpio_regs = (void __iomem *)GPIO_BASE;
31 int port = gpio / 32;
32 int pin = gpio % 32;
33
34 writel(BIT(pin), gpio_regs + GPIO_PXINTC(port));
35 writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port));
36 writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port));
37 writel(BIT(pin), gpio_regs +
38 (value ? GPIO_PXPAT0S(port) : GPIO_PXPAT0C(port)));
39}