| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2008 |
| Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 4 | * Stelian Pop <stelian@popies.net> |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 5 | * Lead Tech Design <www.leadtechdesign.com> |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| Reinhard Meyer | b06208c | 2010-11-07 13:26:14 +0100 | [diff] [blame] | 9 | #include <asm/io.h> |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 10 | #include <asm/arch/hardware.h> |
| 11 | #include <asm/arch/at91_rstc.h> |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 12 | |
| Reinhard Meyer | 609e631 | 2010-08-09 13:25:37 +0200 | [diff] [blame] | 13 | /* Reset the cpu by telling the reset controller to do so */ |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 14 | void reset_cpu(ulong ignored) |
| 15 | { |
| Reinhard Meyer | e260d0b | 2010-11-03 15:39:55 +0100 | [diff] [blame] | 16 | at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC; |
| Jens Scharsig | a4db1ca | 2010-02-03 22:46:58 +0100 | [diff] [blame] | 17 | |
| Reinhard Meyer | 609e631 | 2010-08-09 13:25:37 +0200 | [diff] [blame] | 18 | writel(AT91_RSTC_KEY |
| 19 | | AT91_RSTC_CR_PROCRST /* Processor Reset */ |
| 20 | | AT91_RSTC_CR_PERRST /* Peripheral Reset */ |
| 21 | #ifdef CONFIG_AT91RESET_EXTRST |
| 22 | | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */ |
| 23 | #endif |
| 24 | , &rstc->cr); |
| 25 | /* never reached */ |
| 26 | while (1) |
| 27 | ; |
| Jean-Christophe PLAGNIOL-VILLARD | 9c5c824 | 2009-05-31 12:44:45 +0200 | [diff] [blame] | 28 | } |