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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +09002/*
3 * include/configs/lager.h
4 * This file is lager board configuration.
5 *
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +09006 * Copyright (C) 2013, 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +09007 */
8
9#ifndef __LAGER_H
10#define __LAGER_H
11
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090012#include "rcar-gen2-common.h"
Nobuhiro Iwamatsue59703e2014-03-31 15:22:31 +090013
Marek Vasut016a6052018-04-23 20:24:06 +020014#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
15#define STACK_AREA_SIZE 0x00100000
16#define LOW_LEVEL_MERAM_STACK \
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090017 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
18
19/* MEMORY */
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090020#define RCAR_GEN2_SDRAM_BASE 0x40000000
21#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
22#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090023
Nobuhiro Iwamatsu0929b742013-10-20 20:28:24 +090024/* SH Ether */
Nobuhiro Iwamatsu0929b742013-10-20 20:28:24 +090025#define CONFIG_SH_ETHER_USE_PORT 0
26#define CONFIG_SH_ETHER_PHY_ADDR 0x1
27#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
Nobuhiro Iwamatsu0929b742013-10-20 20:28:24 +090028#define CONFIG_SH_ETHER_CACHE_WRITEBACK
29#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Marek Vasut016a6052018-04-23 20:24:06 +020030#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
Nobuhiro Iwamatsu0929b742013-10-20 20:28:24 +090031#define CONFIG_BITBANGMII
32#define CONFIG_BITBANGMII_MULTI
33
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090034/* Board Clock */
Nobuhiro Iwamatsu18d337a2014-03-31 14:03:07 +090035#define RMOBILE_XTAL_CLK 20000000u
36#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090037
Marek Vasut016a6052018-04-23 20:24:06 +020038#define CONFIG_EXTRA_ENV_SETTINGS \
Marek Vasut4f34a4b2018-11-27 00:19:03 +010039 "bootm_size=0x10000000\0"
Nobuhiro Iwamatsubaf336a2014-12-03 15:30:30 +090040
Marek Vasut016a6052018-04-23 20:24:06 +020041/* SPL support */
42#define CONFIG_SPL_TEXT_BASE 0xe6300000
43#define CONFIG_SPL_STACK 0xe6340000
44#define CONFIG_SPL_MAX_SIZE 0x4000
45#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
46#ifdef CONFIG_SPL_BUILD
47#define CONFIG_CONS_SCIF0
48#define CONFIG_SH_SCIF_CLK_FREQ 65000000
49#endif
Nobuhiro Iwamatsu4ca383a2014-11-21 10:19:32 +090050
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090051#endif /* __LAGER_H */