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Simon Glassec3be542015-08-30 16:55:41 -06001/*
2 * (C) Copyright 2015 Google, Inc
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef __CONFIG_RK3288_COMMON_H
8#define __CONFIG_RK3288_COMMON_H
9
10#include <asm/arch/hardware.h>
Jacob Chen63dc9712016-10-08 13:47:41 +080011#include "rockchip-common.h"
Simon Glassec3be542015-08-30 16:55:41 -060012
Xu Ziyuan68728e82016-08-27 21:53:14 +080013#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
Simon Glassec3be542015-08-30 16:55:41 -060014#define CONFIG_SYS_NO_FLASH
15#define CONFIG_NR_DRAM_BANKS 1
Simon Glassec3be542015-08-30 16:55:41 -060016#define CONFIG_ENV_SIZE 0x2000
Simon Glassec3be542015-08-30 16:55:41 -060017#define CONFIG_SYS_MAXARGS 16
18#define CONFIG_BAUDRATE 115200
19#define CONFIG_SYS_MALLOC_LEN (32 << 20)
20#define CONFIG_SYS_CBSIZE 1024
Simon Glassec3be542015-08-30 16:55:41 -060021#define CONFIG_SYS_THUMB_BUILD
Simon Glassec3be542015-08-30 16:55:41 -060022
23#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000)
huang lin8db3e242015-11-17 14:20:09 +080024#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */
25#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8)
Simon Glassec3be542015-08-30 16:55:41 -060026
27#define CONFIG_SPL_FRAMEWORK
Simon Glassec3be542015-08-30 16:55:41 -060028#define CONFIG_SYS_NS16550_MEM32
29#define CONFIG_SPL_BOARD_INIT
30
Xu Ziyuan5401eb82016-07-12 19:09:49 +080031#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
32/* Bootrom will load u-boot binary to 0x0 once return from SPL */
33#define CONFIG_SYS_TEXT_BASE 0x00000000
34#else
Simon Glassec3be542015-08-30 16:55:41 -060035#define CONFIG_SYS_TEXT_BASE 0x00100000
Xu Ziyuan5401eb82016-07-12 19:09:49 +080036#endif
Simon Glassec3be542015-08-30 16:55:41 -060037#define CONFIG_SYS_INIT_SP_ADDR 0x00100000
38#define CONFIG_SYS_LOAD_ADDR 0x00800800
39#define CONFIG_SPL_STACK 0xff718000
40#define CONFIG_SPL_TEXT_BASE 0xff704004
41
42/* MMC/SD IP block */
Simon Glassec3be542015-08-30 16:55:41 -060043#define CONFIG_GENERIC_MMC
Simon Glassec3be542015-08-30 16:55:41 -060044#define CONFIG_BOUNCE_BUFFER
45
Simon Glassec3be542015-08-30 16:55:41 -060046#define CONFIG_FAT_WRITE
Simon Glassec3be542015-08-30 16:55:41 -060047
48/* RAW SD card / eMMC locations. */
Simon Glassec3be542015-08-30 16:55:41 -060049#define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
50
51/* FAT sd card locations. */
52#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
53#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
54
Simon Glassec3be542015-08-30 16:55:41 -060055#define CONFIG_SYS_SDRAM_BASE 0
56#define CONFIG_NR_DRAM_BANKS 1
57#define SDRAM_BANK_SIZE (2UL << 30)
58
59#define CONFIG_SPI_FLASH
60#define CONFIG_SPI
Simon Glassec3be542015-08-30 16:55:41 -060061#define CONFIG_SF_DEFAULT_SPEED 20000000
62
jk.kernel@gmail.com376bcc62016-07-26 18:28:24 +080063#ifndef CONFIG_SPL_BUILD
Xu Ziyuana11a53f2016-07-15 00:26:59 +080064/* usb otg */
65#define CONFIG_USB_GADGET
66#define CONFIG_USB_GADGET_DUALSPEED
67#define CONFIG_USB_GADGET_DWC2_OTG
68#define CONFIG_ROCKCHIP_USB2_PHY
69#define CONFIG_USB_GADGET_VBUS_DRAW 0
70
71/* fastboot */
72#define CONFIG_CMD_FASTBOOT
73#define CONFIG_USB_FUNCTION_FASTBOOT
74#define CONFIG_FASTBOOT_FLASH
75#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */
jk.kernel@gmail.com9a04f282016-07-26 18:28:26 +080076#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
Xu Ziyuana11a53f2016-07-15 00:26:59 +080077#define CONFIG_FASTBOOT_BUF_SIZE 0x08000000
78
Xu Ziyuanb653b472016-08-03 11:55:06 +080079/* usb mass storage */
80#define CONFIG_USB_FUNCTION_MASS_STORAGE
81#define CONFIG_CMD_USB_MASS_STORAGE
82
Xu Ziyuana11a53f2016-07-15 00:26:59 +080083#define CONFIG_USB_GADGET_DOWNLOAD
84#define CONFIG_G_DNL_MANUFACTURER "Rockchip"
85#define CONFIG_G_DNL_VENDOR_NUM 0x2207
86#define CONFIG_G_DNL_PRODUCT_NUM 0x320a
87
Kever Yangf7d6def2016-11-24 15:29:51 +080088/* usb host support */
89#ifdef CONFIG_CMD_USB
90#define CONFIG_USB_DWC2
91#define CONFIG_USB_HOST_ETHER
92#define CONFIG_USB_ETHER_SMSC95XX
93#define CONFIG_USB_ETHER_ASIX
94#endif
Sjoerd Simons427418b2015-08-30 16:55:48 -060095#define ENV_MEM_LAYOUT_SETTINGS \
96 "scriptaddr=0x00000000\0" \
97 "pxefile_addr_r=0x00100000\0" \
98 "fdt_addr_r=0x01f00000\0" \
99 "kernel_addr_r=0x02000000\0" \
100 "ramdisk_addr_r=0x04000000\0"
101
Sjoerd Simons427418b2015-08-30 16:55:48 -0600102#include <config_distro_bootcmd.h>
103
Sandy Pattersonf4526ef2016-07-11 13:38:52 -0400104/* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so
Sjoerd Simons427418b2015-08-30 16:55:48 -0600105 * limit the fdt reallocation to that */
106#define CONFIG_EXTRA_ENV_SETTINGS \
Sandy Pattersonf4526ef2016-07-11 13:38:52 -0400107 "fdt_high=0x0fffffff\0" \
108 "initrd_high=0x0fffffff\0" \
Xu Ziyuan05c3ca62016-08-03 11:55:05 +0800109 "partitions=" PARTS_DEFAULT \
Sjoerd Simons427418b2015-08-30 16:55:48 -0600110 ENV_MEM_LAYOUT_SETTINGS \
Simon Glasscf88b7c2016-01-21 19:44:13 -0700111 ROCKCHIP_DEVICE_SETTINGS \
Sjoerd Simons427418b2015-08-30 16:55:48 -0600112 BOOTENV
Simon Glassec3be542015-08-30 16:55:41 -0600113#endif
114
Jacob Chenc95f3782016-09-19 18:46:28 +0800115#define CONFIG_PREBOOT
116
Simon Glassec3be542015-08-30 16:55:41 -0600117#endif