blob: a5f337aa17c8af50495992146d5140bca2b77af1 [file] [log] [blame]
Adam Ford14879032020-05-03 08:11:33 -05001// SPDX-License-Identifier: GPL-2.0+
2
3#include <common.h>
4#include <cpu_func.h>
5#include <hang.h>
Simon Glass97589732020-05-10 11:40:02 -06006#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -06007#include <log.h>
Adam Ford14879032020-05-03 08:11:33 -05008#include <spl.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06009#include <asm/global_data.h>
Adam Ford14879032020-05-03 08:11:33 -050010#include <asm/io.h>
11#include <asm/mach-imx/iomux-v3.h>
12#include <asm/arch/clock.h>
13#include <asm/arch/imx8mm_pins.h>
14#include <asm/arch/sys_proto.h>
15#include <asm/mach-imx/boot_mode.h>
16#include <asm/arch/ddr.h>
17
18#include <dm/uclass.h>
19#include <dm/device.h>
20#include <dm/uclass-internal.h>
21#include <dm/device-internal.h>
22
23#include <power/pmic.h>
24#include <power/bd71837.h>
25
26DECLARE_GLOBAL_DATA_PTR;
27
28int spl_board_boot_device(enum boot_device boot_dev_spl)
29{
30 switch (boot_dev_spl) {
31 case SD2_BOOT:
32 case MMC2_BOOT:
33 return BOOT_DEVICE_MMC1;
34 case SD3_BOOT:
35 case MMC3_BOOT:
36 return BOOT_DEVICE_MMC2;
Adam Ford2cc246a2022-10-22 09:28:23 -050037 case USB_BOOT:
38 return BOOT_DEVICE_BOARD;
Adam Ford14879032020-05-03 08:11:33 -050039 default:
40 return BOOT_DEVICE_NONE;
41 }
42}
43
44static void spl_dram_init(void)
45{
46 ddr_init(&dram_timing);
47}
48
Adam Ford14879032020-05-03 08:11:33 -050049#ifdef CONFIG_SPL_LOAD_FIT
50int board_fit_config_name_match(const char *name)
51{
52 /* Just empty function now - can't decide what to choose */
53 debug("%s: %s\n", __func__, name);
54
55 return 0;
56}
57#endif
58
Adam Ford14879032020-05-03 08:11:33 -050059static int power_init_board(void)
60{
61 struct udevice *dev;
62 int ret;
63
64 ret = pmic_get("pmic@4b", &dev);
65 if (ret == -ENODEV) {
66 puts("No pmic\n");
67 return 0;
68 }
69 if (ret != 0)
70 return ret;
71
72 /* decrease RESET key long push time from the default 10s to 10ms */
73 pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
74
75 /* unlock the PMIC regs */
76 pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
77
78 /* increase VDD_SOC to typical value 0.85v before first DRAM access */
79 pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
80
81 /* increase VDD_DRAM to 0.975v for 3Ghz DDR */
82 pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
83
84 /* lock the PMIC regs */
85 pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
86
87 return 0;
88}
89
90void board_init_f(ulong dummy)
91{
92 struct udevice *dev;
93 int ret;
94
95 arch_cpu_init();
96
97 init_uart_clk(1);
98
Adam Ford14879032020-05-03 08:11:33 -050099 timer_init();
100
Adam Ford14879032020-05-03 08:11:33 -0500101 /* Clear the BSS. */
102 memset(__bss_start, 0, __bss_end - __bss_start);
103
104 ret = spl_early_init();
105 if (ret) {
106 debug("spl_early_init() failed: %d\n", ret);
107 hang();
108 }
109
Peng Fana9ed59c2022-06-11 20:20:55 +0800110 preloader_console_init();
111
Adam Ford14879032020-05-03 08:11:33 -0500112 ret = uclass_get_device_by_name(UCLASS_CLK,
113 "clock-controller@30380000",
114 &dev);
115 if (ret < 0) {
116 printf("Failed to find clock node. Check device tree\n");
117 hang();
118 }
119
120 enable_tzc380();
121
122 power_init_board();
123
124 /* DDR initialization */
125 spl_dram_init();
126
127 board_init_r(NULL, 0);
128}