blob: 171bd189d3bad621eb5515be88d49b45f6a1d352 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Dirk Eibachfb605942017-02-22 16:07:23 +01002/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
Dirk Eibachfb605942017-02-22 16:07:23 +01005 */
6
7#ifndef _CONFIG_CONTROLCENTERDC_H
8#define _CONFIG_CONTROLCENTERDC_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
13#define CONFIG_CUSTOMER_BOARD_SUPPORT
14
15#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
Dirk Eibachfb605942017-02-22 16:07:23 +010016
17/*
18 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
19 * for DDR ECC byte filling in the SPL before loading the main
20 * U-Boot into it.
21 */
Dirk Eibachfb605942017-02-22 16:07:23 +010022
23#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
24
25#define CONFIG_LOADADDR 1000000
26
Dirk Eibachfb605942017-02-22 16:07:23 +010027/*
Dirk Eibachfb605942017-02-22 16:07:23 +010028 * SATA/SCSI/AHCI configuration
29 */
Dirk Eibachfb605942017-02-22 16:07:23 +010030#define CONFIG_SCSI_AHCI_PLAT
31#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
32#define CONFIG_SYS_SCSI_MAX_LUN 1
33#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
34 CONFIG_SYS_SCSI_MAX_LUN)
35
Dirk Eibachfb605942017-02-22 16:07:23 +010036/* USB/EHCI configuration */
37#define CONFIG_EHCI_IS_TDI
38
39/* Environment in SPI NOR flash */
Dirk Eibachfb605942017-02-22 16:07:23 +010040
Dirk Eibachfb605942017-02-22 16:07:23 +010041#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
42
43/* PCIe support */
44#ifndef CONFIG_SPL_BUILD
Dirk Eibachfb605942017-02-22 16:07:23 +010045#define CONFIG_PCI_SCAN_SHOW
46#endif
47
Dirk Eibachfb605942017-02-22 16:07:23 +010048/*
49 * Software (bit-bang) MII driver configuration
50 */
Dirk Eibachfb605942017-02-22 16:07:23 +010051#define CONFIG_BITBANGMII_MULTI
52
53/* SPL */
54/*
55 * Select the boot device here
56 *
57 * Currently supported are:
58 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
59 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
60 */
61#define SPL_BOOT_SPI_NOR_FLASH 1
62#define SPL_BOOT_SDIO_MMC_CARD 2
63#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
64
65/* Defines for SPL */
Dirk Eibachfb605942017-02-22 16:07:23 +010066#define CONFIG_SPL_SIZE (160 << 10)
67
68#if defined(CONFIG_SECURED_MODE_IMAGE)
Dirk Eibachfb605942017-02-22 16:07:23 +010069#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
70#else
Dirk Eibachfb605942017-02-22 16:07:23 +010071#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
72#endif
73
74#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
75#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
76
77#ifdef CONFIG_SPL_BUILD
78#define CONFIG_SYS_MALLOC_SIMPLE
79#endif
80
81#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
82#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
83
84#define CONFIG_SPL_LIBCOMMON_SUPPORT
85#define CONFIG_SPL_LIBGENERIC_SUPPORT
Simon Glassbccfc2e2021-07-10 21:14:36 -060086#define CONFIG_SPL_I2C
Dirk Eibachfb605942017-02-22 16:07:23 +010087
Dirk Eibachfb605942017-02-22 16:07:23 +010088#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
89/* SPL related MMC defines */
90#define CONFIG_SPL_MMC_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +010091#ifdef CONFIG_SPL_BUILD
92#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
93#endif
94#endif
95
96/*
97 * Environment Configuration
98 */
Dirk Eibachfb605942017-02-22 16:07:23 +010099
Mario Six790d8442018-03-28 14:38:20 +0200100#define CONFIG_HOSTNAME "ccdc"
Dirk Eibachfb605942017-02-22 16:07:23 +0100101#define CONFIG_ROOTPATH "/opt/nfsroot"
102#define CONFIG_BOOTFILE "ccdc.img"
103
Dirk Eibachfb605942017-02-22 16:07:23 +0100104#define CONFIG_EXTRA_ENV_SETTINGS \
105 "netdev=eth1\0" \
106 "consoledev=ttyS1\0" \
107 "u-boot=u-boot.bin\0" \
108 "bootfile_addr=1000000\0" \
109 "keyprogram_addr=3000000\0" \
110 "keyprogram_file=keyprogram.img\0" \
111 "fdtfile=controlcenterdc.dtb\0" \
112 "load=tftpboot ${loadaddr} ${u-boot}\0" \
113 "mmcdev=0:2\0" \
114 "update=sf probe 1:0;" \
115 " sf erase 0 +${filesize};" \
116 " sf write ${fileaddr} 0 ${filesize}\0" \
117 "upd=run load update\0" \
118 "fdt_high=0x10000000\0" \
119 "initrd_high=0x10000000\0" \
120 "loadkeyprogram=tpm flush_keys;" \
121 " mmc rescan;" \
122 " ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
123 " source ${keyprogram_addr}:script@1\0" \
124 "gpio1=gpio@22_25\0" \
125 "gpio2=A29\0" \
126 "blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
127 "2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
128 "bootfail=for i in ${blinkseq}; do" \
129 " if test $i -eq 0; then" \
130 " gpio clear ${gpio1}; gpio set ${gpio2};" \
131 " elif test $i -eq 1; then" \
132 " gpio clear ${gpio1}; gpio clear ${gpio2};" \
133 " elif test $i -eq 2; then" \
134 " gpio set ${gpio1}; gpio set ${gpio2};" \
135 " else;" \
136 " gpio clear ${gpio1}; gpio set ${gpio2};" \
137 " fi; sleep 0.12; done\0"
138
139#define CONFIG_NFSBOOTCOMMAND \
140 "setenv bootargs root=/dev/nfs rw " \
141 "nfsroot=${serverip}:${rootpath} " \
142 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
143 "console=${consoledev},${baudrate} ${othbootargs}; " \
144 "tftpboot ${bootfile_addr} ${bootfile}; " \
145 "bootm ${bootfile_addr}"
146
147#define CONFIG_MMCBOOTCOMMAND \
148 "setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
149 "console=${consoledev},${baudrate} ${othbootargs}; " \
150 "ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
151 "bootm ${bootfile_addr}"
152
153#define CONFIG_BOOTCOMMAND \
154 "if env exists keyprogram; then;" \
155 " setenv keyprogram; run nfsboot;" \
156 " fi;" \
157 " run dobootfail"
158
159/*
160 * mv-common.h should be defined after CMD configs since it used them
161 * to enable certain macros
162 */
163#include "mv-common.h"
164
165#endif /* _CONFIG_CONTROLCENTERDC_H */