wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 1 | /* |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 2 | * (C) Copyright 2003 |
| 3 | * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de |
| 4 | * |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 5 | * (C) Copyright 2002 |
| 6 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 7 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | /* |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 12 | * Altera FPGA support |
| 13 | */ |
| 14 | #include <common.h> |
Marek Vasut | b9d4df3 | 2014-09-16 20:33:54 +0200 | [diff] [blame] | 15 | #include <errno.h> |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 16 | #include <ACEX1K.h> |
eran liberty | 4c373a9 | 2008-03-27 00:50:49 +0100 | [diff] [blame] | 17 | #include <stratixII.h> |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 18 | |
Marek Vasut | 9e3a844 | 2014-09-16 20:21:42 +0200 | [diff] [blame] | 19 | /* Define FPGA_DEBUG to 1 to get debug printf's */ |
| 20 | #define FPGA_DEBUG 0 |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 21 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 22 | static const struct altera_fpga { |
| 23 | enum altera_family family; |
| 24 | const char *name; |
| 25 | int (*load)(Altera_desc *, const void *, size_t); |
| 26 | int (*dump)(Altera_desc *, const void *, size_t); |
| 27 | int (*info)(Altera_desc *); |
| 28 | } altera_fpga[] = { |
| 29 | #if defined(CONFIG_FPGA_ACEX1K) |
| 30 | { Altera_ACEX1K, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, |
| 31 | { Altera_CYC2, "ACEX1K", ACEX1K_load, ACEX1K_dump, ACEX1K_info }, |
| 32 | #elif defined(CONFIG_FPGA_CYCLON2) |
| 33 | { Altera_ACEX1K, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, |
| 34 | { Altera_CYC2, "CycloneII", CYC2_load, CYC2_dump, CYC2_info }, |
| 35 | #endif |
| 36 | #if defined(CONFIG_FPGA_STRATIX_II) |
| 37 | { Altera_StratixII, "StratixII", StratixII_load, |
| 38 | StratixII_dump, StratixII_info }, |
| 39 | #endif |
Stefan Roese | d919d72 | 2016-02-12 13:48:02 +0100 | [diff] [blame] | 40 | #if defined(CONFIG_FPGA_STRATIX_V) |
| 41 | { Altera_StratixV, "StratixV", stratixv_load, NULL, NULL }, |
| 42 | #endif |
Pavel Machek | c721380 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 43 | #if defined(CONFIG_FPGA_SOCFPGA) |
| 44 | { Altera_SoCFPGA, "SoC FPGA", socfpga_load, NULL, NULL }, |
| 45 | #endif |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 46 | }; |
| 47 | |
Marek Vasut | ff4072c | 2014-09-16 20:32:51 +0200 | [diff] [blame] | 48 | static int altera_validate(Altera_desc *desc, const char *fn) |
| 49 | { |
| 50 | if (!desc) { |
| 51 | printf("%s: NULL descriptor!\n", fn); |
Marek Vasut | b9d4df3 | 2014-09-16 20:33:54 +0200 | [diff] [blame] | 52 | return -EINVAL; |
Marek Vasut | ff4072c | 2014-09-16 20:32:51 +0200 | [diff] [blame] | 53 | } |
| 54 | |
| 55 | if ((desc->family < min_altera_type) || |
| 56 | (desc->family > max_altera_type)) { |
| 57 | printf("%s: Invalid family type, %d\n", fn, desc->family); |
Marek Vasut | b9d4df3 | 2014-09-16 20:33:54 +0200 | [diff] [blame] | 58 | return -EINVAL; |
Marek Vasut | ff4072c | 2014-09-16 20:32:51 +0200 | [diff] [blame] | 59 | } |
| 60 | |
| 61 | if ((desc->iface < min_altera_iface_type) || |
| 62 | (desc->iface > max_altera_iface_type)) { |
| 63 | printf("%s: Invalid Interface type, %d\n", fn, desc->iface); |
Marek Vasut | b9d4df3 | 2014-09-16 20:33:54 +0200 | [diff] [blame] | 64 | return -EINVAL; |
Marek Vasut | ff4072c | 2014-09-16 20:32:51 +0200 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | if (!desc->size) { |
| 68 | printf("%s: NULL part size\n", fn); |
Marek Vasut | b9d4df3 | 2014-09-16 20:33:54 +0200 | [diff] [blame] | 69 | return -EINVAL; |
Marek Vasut | ff4072c | 2014-09-16 20:32:51 +0200 | [diff] [blame] | 70 | } |
| 71 | |
Marek Vasut | b9d4df3 | 2014-09-16 20:33:54 +0200 | [diff] [blame] | 72 | return 0; |
Marek Vasut | ff4072c | 2014-09-16 20:32:51 +0200 | [diff] [blame] | 73 | } |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 74 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 75 | static const struct altera_fpga * |
| 76 | altera_desc_to_fpga(Altera_desc *desc, const char *fn) |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 77 | { |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 78 | int i; |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 79 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 80 | if (altera_validate(desc, fn)) { |
| 81 | printf("%s: Invalid device descriptor\n", fn); |
| 82 | return NULL; |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 83 | } |
| 84 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 85 | for (i = 0; i < ARRAY_SIZE(altera_fpga); i++) { |
| 86 | if (desc->family == altera_fpga[i].family) |
| 87 | break; |
| 88 | } |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 89 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 90 | if (i == ARRAY_SIZE(altera_fpga)) { |
| 91 | printf("%s: Unsupported family type, %d\n", fn, desc->family); |
| 92 | return NULL; |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 93 | } |
| 94 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 95 | return &altera_fpga[i]; |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 96 | } |
| 97 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 98 | int altera_load(Altera_desc *desc, const void *buf, size_t bsize) |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 99 | { |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 100 | const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 101 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 102 | if (!fpga) |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 103 | return FPGA_FAIL; |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 104 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 105 | debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n", |
| 106 | __func__, fpga->name); |
| 107 | if (fpga->load) |
| 108 | return fpga->load(desc, buf, bsize); |
| 109 | return 0; |
| 110 | } |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 111 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 112 | int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) |
| 113 | { |
| 114 | const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 115 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 116 | if (!fpga) |
| 117 | return FPGA_FAIL; |
| 118 | |
| 119 | debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n", |
| 120 | __func__, fpga->name); |
| 121 | if (fpga->dump) |
| 122 | return fpga->dump(desc, buf, bsize); |
| 123 | return 0; |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 124 | } |
| 125 | |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 126 | int altera_info(Altera_desc *desc) |
wdenk | 5b845b6 | 2002-08-21 21:57:24 +0000 | [diff] [blame] | 127 | { |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 128 | const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 129 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 130 | if (!fpga) |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 131 | return FPGA_FAIL; |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 132 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 133 | printf("Family: \t%s\n", fpga->name); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 134 | |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 135 | printf("Interface type:\t"); |
| 136 | switch (desc->iface) { |
| 137 | case passive_serial: |
| 138 | printf("Passive Serial (PS)\n"); |
| 139 | break; |
| 140 | case passive_parallel_synchronous: |
| 141 | printf("Passive Parallel Synchronous (PPS)\n"); |
| 142 | break; |
| 143 | case passive_parallel_asynchronous: |
| 144 | printf("Passive Parallel Asynchronous (PPA)\n"); |
| 145 | break; |
| 146 | case passive_serial_asynchronous: |
| 147 | printf("Passive Serial Asynchronous (PSA)\n"); |
| 148 | break; |
| 149 | case altera_jtag_mode: /* Not used */ |
| 150 | printf("JTAG Mode\n"); |
| 151 | break; |
| 152 | case fast_passive_parallel: |
| 153 | printf("Fast Passive Parallel (FPP)\n"); |
| 154 | break; |
| 155 | case fast_passive_parallel_security: |
| 156 | printf("Fast Passive Parallel with Security (FPPS)\n"); |
| 157 | break; |
| 158 | /* Add new interface types here */ |
| 159 | default: |
| 160 | printf("Unsupported interface type, %d\n", desc->iface); |
| 161 | } |
| 162 | |
| 163 | printf("Device Size: \t%zd bytes\n" |
| 164 | "Cookie: \t0x%x (%d)\n", |
| 165 | desc->size, desc->cookie, desc->cookie); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 166 | |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 167 | if (desc->iface_fns) { |
| 168 | printf("Device Function Table @ 0x%p\n", desc->iface_fns); |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 169 | if (fpga->info) |
| 170 | fpga->info(desc); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 171 | } else { |
Marek Vasut | 1822135 | 2014-09-16 20:29:24 +0200 | [diff] [blame] | 172 | printf("No Device Function Table.\n"); |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 173 | } |
| 174 | |
Marek Vasut | f5d25e4 | 2014-09-16 21:17:51 +0200 | [diff] [blame] | 175 | return FPGA_SUCCESS; |
wdenk | 9b7f384 | 2003-10-09 20:09:04 +0000 | [diff] [blame] | 176 | } |