Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | |
| 3 | /dts-v1/; |
| 4 | |
| 5 | #include <dt-bindings/gpio/gpio.h> |
| 6 | #include <dt-bindings/leds/common.h> |
| 7 | #include "rk3588.dtsi" |
| 8 | |
| 9 | / { |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 10 | model = "Radxa ROCK 5B"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 11 | compatible = "radxa,rock-5b", "rockchip,rk3588"; |
| 12 | |
| 13 | aliases { |
| 14 | mmc0 = &sdhci; |
| 15 | mmc1 = &sdmmc; |
| 16 | mmc2 = &sdio; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 17 | }; |
| 18 | |
| 19 | chosen { |
| 20 | stdout-path = "serial2:1500000n8"; |
| 21 | }; |
| 22 | |
| 23 | analog-sound { |
| 24 | compatible = "audio-graph-card"; |
| 25 | label = "rk3588-es8316"; |
| 26 | |
| 27 | widgets = "Microphone", "Mic Jack", |
| 28 | "Headphone", "Headphones"; |
| 29 | |
| 30 | routing = "MIC2", "Mic Jack", |
| 31 | "Headphones", "HPOL", |
| 32 | "Headphones", "HPOR"; |
| 33 | |
| 34 | dais = <&i2s0_8ch_p0>; |
| 35 | hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; |
| 36 | pinctrl-names = "default"; |
| 37 | pinctrl-0 = <&hp_detect>; |
| 38 | }; |
| 39 | |
| 40 | leds { |
| 41 | compatible = "gpio-leds"; |
| 42 | pinctrl-names = "default"; |
| 43 | pinctrl-0 = <&led_rgb_b>; |
| 44 | |
| 45 | led_rgb_b { |
| 46 | function = LED_FUNCTION_STATUS; |
| 47 | color = <LED_COLOR_ID_BLUE>; |
| 48 | gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; |
| 49 | linux,default-trigger = "heartbeat"; |
| 50 | }; |
| 51 | }; |
| 52 | |
| 53 | fan: pwm-fan { |
| 54 | compatible = "pwm-fan"; |
| 55 | cooling-levels = <0 95 145 195 255>; |
| 56 | fan-supply = <&vcc5v0_sys>; |
| 57 | pwms = <&pwm1 0 50000 0>; |
| 58 | #cooling-cells = <2>; |
| 59 | }; |
| 60 | |
Tom Rini | 6bb92fc | 2024-05-20 09:54:58 -0600 | [diff] [blame] | 61 | rfkill { |
| 62 | compatible = "rfkill-gpio"; |
| 63 | label = "rfkill-pcie-wlan"; |
| 64 | radio-type = "wlan"; |
| 65 | shutdown-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; |
| 66 | }; |
| 67 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 68 | vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator { |
| 69 | compatible = "regulator-fixed"; |
| 70 | enable-active-high; |
| 71 | gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; |
| 72 | pinctrl-names = "default"; |
| 73 | pinctrl-0 = <&pcie2_0_vcc3v3_en>; |
| 74 | regulator-name = "vcc3v3_pcie2x1l0"; |
| 75 | regulator-always-on; |
| 76 | regulator-boot-on; |
| 77 | regulator-min-microvolt = <3300000>; |
| 78 | regulator-max-microvolt = <3300000>; |
| 79 | startup-delay-us = <50000>; |
| 80 | vin-supply = <&vcc5v0_sys>; |
| 81 | }; |
| 82 | |
| 83 | vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator { |
| 84 | compatible = "regulator-fixed"; |
| 85 | regulator-name = "vcc3v3_pcie2x1l2"; |
| 86 | regulator-min-microvolt = <3300000>; |
| 87 | regulator-max-microvolt = <3300000>; |
| 88 | startup-delay-us = <5000>; |
| 89 | vin-supply = <&vcc_3v3_s3>; |
| 90 | }; |
| 91 | |
| 92 | vcc3v3_pcie30: vcc3v3-pcie30-regulator { |
| 93 | compatible = "regulator-fixed"; |
| 94 | enable-active-high; |
| 95 | gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; |
| 96 | pinctrl-names = "default"; |
| 97 | pinctrl-0 = <&pcie3_vcc3v3_en>; |
| 98 | regulator-name = "vcc3v3_pcie30"; |
| 99 | regulator-min-microvolt = <3300000>; |
| 100 | regulator-max-microvolt = <3300000>; |
| 101 | startup-delay-us = <5000>; |
| 102 | vin-supply = <&vcc5v0_sys>; |
| 103 | }; |
| 104 | |
| 105 | vcc5v0_host: vcc5v0-host-regulator { |
| 106 | compatible = "regulator-fixed"; |
| 107 | regulator-name = "vcc5v0_host"; |
| 108 | regulator-boot-on; |
| 109 | regulator-always-on; |
| 110 | regulator-min-microvolt = <5000000>; |
| 111 | regulator-max-microvolt = <5000000>; |
| 112 | enable-active-high; |
| 113 | gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; |
| 114 | pinctrl-names = "default"; |
| 115 | pinctrl-0 = <&vcc5v0_host_en>; |
| 116 | vin-supply = <&vcc5v0_sys>; |
| 117 | }; |
| 118 | |
| 119 | vcc5v0_sys: vcc5v0-sys-regulator { |
| 120 | compatible = "regulator-fixed"; |
| 121 | regulator-name = "vcc5v0_sys"; |
| 122 | regulator-always-on; |
| 123 | regulator-boot-on; |
| 124 | regulator-min-microvolt = <5000000>; |
| 125 | regulator-max-microvolt = <5000000>; |
| 126 | }; |
| 127 | |
| 128 | vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { |
| 129 | compatible = "regulator-fixed"; |
| 130 | regulator-name = "vcc_1v1_nldo_s3"; |
| 131 | regulator-always-on; |
| 132 | regulator-boot-on; |
| 133 | regulator-min-microvolt = <1100000>; |
| 134 | regulator-max-microvolt = <1100000>; |
| 135 | vin-supply = <&vcc5v0_sys>; |
| 136 | }; |
| 137 | }; |
| 138 | |
| 139 | &combphy0_ps { |
| 140 | status = "okay"; |
| 141 | }; |
| 142 | |
| 143 | &combphy1_ps { |
| 144 | status = "okay"; |
| 145 | }; |
| 146 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 147 | &combphy2_psu { |
| 148 | status = "okay"; |
| 149 | }; |
| 150 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 151 | &cpu_b0 { |
| 152 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 153 | }; |
| 154 | |
| 155 | &cpu_b1 { |
| 156 | cpu-supply = <&vdd_cpu_big0_s0>; |
| 157 | }; |
| 158 | |
| 159 | &cpu_b2 { |
| 160 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 161 | }; |
| 162 | |
| 163 | &cpu_b3 { |
| 164 | cpu-supply = <&vdd_cpu_big1_s0>; |
| 165 | }; |
| 166 | |
| 167 | &cpu_l0 { |
| 168 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 169 | }; |
| 170 | |
| 171 | &cpu_l1 { |
| 172 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 173 | }; |
| 174 | |
| 175 | &cpu_l2 { |
| 176 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 177 | }; |
| 178 | |
| 179 | &cpu_l3 { |
| 180 | cpu-supply = <&vdd_cpu_lit_s0>; |
| 181 | }; |
| 182 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 183 | &gpu { |
| 184 | mali-supply = <&vdd_gpu_s0>; |
| 185 | status = "okay"; |
| 186 | }; |
| 187 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 188 | &i2c0 { |
| 189 | pinctrl-names = "default"; |
| 190 | pinctrl-0 = <&i2c0m2_xfer>; |
| 191 | status = "okay"; |
| 192 | |
| 193 | vdd_cpu_big0_s0: regulator@42 { |
| 194 | compatible = "rockchip,rk8602"; |
| 195 | reg = <0x42>; |
| 196 | fcs,suspend-voltage-selector = <1>; |
| 197 | regulator-name = "vdd_cpu_big0_s0"; |
| 198 | regulator-always-on; |
| 199 | regulator-boot-on; |
| 200 | regulator-min-microvolt = <550000>; |
| 201 | regulator-max-microvolt = <1050000>; |
| 202 | regulator-ramp-delay = <2300>; |
| 203 | vin-supply = <&vcc5v0_sys>; |
| 204 | |
| 205 | regulator-state-mem { |
| 206 | regulator-off-in-suspend; |
| 207 | }; |
| 208 | }; |
| 209 | |
| 210 | vdd_cpu_big1_s0: regulator@43 { |
| 211 | compatible = "rockchip,rk8603", "rockchip,rk8602"; |
| 212 | reg = <0x43>; |
| 213 | fcs,suspend-voltage-selector = <1>; |
| 214 | regulator-name = "vdd_cpu_big1_s0"; |
| 215 | regulator-always-on; |
| 216 | regulator-boot-on; |
| 217 | regulator-min-microvolt = <550000>; |
| 218 | regulator-max-microvolt = <1050000>; |
| 219 | regulator-ramp-delay = <2300>; |
| 220 | vin-supply = <&vcc5v0_sys>; |
| 221 | |
| 222 | regulator-state-mem { |
| 223 | regulator-off-in-suspend; |
| 224 | }; |
| 225 | }; |
| 226 | }; |
| 227 | |
| 228 | &i2c6 { |
| 229 | status = "okay"; |
| 230 | |
| 231 | hym8563: rtc@51 { |
| 232 | compatible = "haoyu,hym8563"; |
| 233 | reg = <0x51>; |
| 234 | #clock-cells = <0>; |
| 235 | clock-output-names = "hym8563"; |
| 236 | pinctrl-names = "default"; |
| 237 | pinctrl-0 = <&hym8563_int>; |
| 238 | interrupt-parent = <&gpio0>; |
| 239 | interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; |
| 240 | wakeup-source; |
| 241 | }; |
| 242 | }; |
| 243 | |
| 244 | &i2c7 { |
| 245 | status = "okay"; |
| 246 | |
| 247 | es8316: audio-codec@11 { |
| 248 | compatible = "everest,es8316"; |
| 249 | reg = <0x11>; |
| 250 | clocks = <&cru I2S0_8CH_MCLKOUT>; |
| 251 | clock-names = "mclk"; |
| 252 | assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; |
| 253 | assigned-clock-rates = <12288000>; |
| 254 | #sound-dai-cells = <0>; |
| 255 | |
| 256 | port { |
| 257 | es8316_p0_0: endpoint { |
| 258 | remote-endpoint = <&i2s0_8ch_p0_0>; |
| 259 | }; |
| 260 | }; |
| 261 | }; |
| 262 | }; |
| 263 | |
| 264 | &i2s0_8ch { |
| 265 | pinctrl-names = "default"; |
| 266 | pinctrl-0 = <&i2s0_lrck |
| 267 | &i2s0_mclk |
| 268 | &i2s0_sclk |
| 269 | &i2s0_sdi0 |
| 270 | &i2s0_sdo0>; |
| 271 | status = "okay"; |
| 272 | |
| 273 | i2s0_8ch_p0: port { |
| 274 | i2s0_8ch_p0_0: endpoint { |
| 275 | dai-format = "i2s"; |
| 276 | mclk-fs = <256>; |
| 277 | remote-endpoint = <&es8316_p0_0>; |
| 278 | }; |
| 279 | }; |
| 280 | }; |
| 281 | |
| 282 | &pcie2x1l0 { |
| 283 | pinctrl-names = "default"; |
| 284 | pinctrl-0 = <&pcie2_0_rst>; |
| 285 | reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; |
| 286 | vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; |
| 287 | status = "okay"; |
| 288 | }; |
| 289 | |
| 290 | &pcie2x1l2 { |
| 291 | pinctrl-names = "default"; |
| 292 | pinctrl-0 = <&pcie2_2_rst>; |
| 293 | reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; |
| 294 | vpcie3v3-supply = <&vcc3v3_pcie2x1l2>; |
| 295 | status = "okay"; |
| 296 | }; |
| 297 | |
| 298 | &pcie30phy { |
| 299 | status = "okay"; |
| 300 | }; |
| 301 | |
| 302 | &pcie3x4 { |
| 303 | pinctrl-names = "default"; |
| 304 | pinctrl-0 = <&pcie3_rst>; |
| 305 | reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; |
| 306 | vpcie3v3-supply = <&vcc3v3_pcie30>; |
| 307 | status = "okay"; |
| 308 | }; |
| 309 | |
| 310 | &pinctrl { |
| 311 | hym8563 { |
| 312 | hym8563_int: hym8563-int { |
| 313 | rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; |
| 314 | }; |
| 315 | }; |
| 316 | |
| 317 | leds { |
| 318 | led_rgb_b: led-rgb-b { |
| 319 | rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; |
| 320 | }; |
| 321 | }; |
| 322 | |
| 323 | sound { |
| 324 | hp_detect: hp-detect { |
| 325 | rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; |
| 326 | }; |
| 327 | }; |
| 328 | |
| 329 | pcie2 { |
| 330 | pcie2_0_rst: pcie2-0-rst { |
| 331 | rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; |
| 332 | }; |
| 333 | |
| 334 | pcie2_0_vcc3v3_en: pcie2-0-vcc-en { |
| 335 | rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; |
| 336 | }; |
| 337 | |
| 338 | pcie2_2_rst: pcie2-2-rst { |
| 339 | rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; |
| 340 | }; |
| 341 | }; |
| 342 | |
| 343 | pcie3 { |
| 344 | pcie3_rst: pcie3-rst { |
| 345 | rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; |
| 346 | }; |
| 347 | |
| 348 | pcie3_vcc3v3_en: pcie3-vcc3v3-en { |
| 349 | rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; |
| 350 | }; |
| 351 | }; |
| 352 | |
| 353 | usb { |
| 354 | vcc5v0_host_en: vcc5v0-host-en { |
| 355 | rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; |
| 356 | }; |
| 357 | }; |
| 358 | }; |
| 359 | |
| 360 | &pwm1 { |
| 361 | status = "okay"; |
| 362 | }; |
| 363 | |
| 364 | &saradc { |
| 365 | vref-supply = <&avcc_1v8_s0>; |
| 366 | status = "okay"; |
| 367 | }; |
| 368 | |
| 369 | &sdhci { |
| 370 | bus-width = <8>; |
| 371 | no-sdio; |
| 372 | no-sd; |
| 373 | non-removable; |
| 374 | mmc-hs400-1_8v; |
| 375 | mmc-hs400-enhanced-strobe; |
| 376 | status = "okay"; |
| 377 | }; |
| 378 | |
| 379 | &sdmmc { |
| 380 | max-frequency = <200000000>; |
| 381 | no-sdio; |
| 382 | no-mmc; |
| 383 | bus-width = <4>; |
| 384 | cap-mmc-highspeed; |
| 385 | cap-sd-highspeed; |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 386 | cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 387 | disable-wp; |
| 388 | sd-uhs-sdr104; |
| 389 | vmmc-supply = <&vcc_3v3_s3>; |
| 390 | vqmmc-supply = <&vccio_sd_s0>; |
| 391 | status = "okay"; |
| 392 | }; |
| 393 | |
| 394 | &sdio { |
| 395 | max-frequency = <200000000>; |
| 396 | no-sd; |
| 397 | no-mmc; |
| 398 | non-removable; |
| 399 | bus-width = <4>; |
| 400 | cap-sdio-irq; |
| 401 | disable-wp; |
| 402 | keep-power-in-suspend; |
| 403 | wakeup-source; |
| 404 | sd-uhs-sdr12; |
| 405 | sd-uhs-sdr25; |
| 406 | sd-uhs-sdr50; |
| 407 | sd-uhs-sdr104; |
| 408 | vmmc-supply = <&vcc3v3_pcie2x1l0>; |
| 409 | vqmmc-supply = <&vcc_1v8_s3>; |
| 410 | pinctrl-names = "default"; |
| 411 | pinctrl-0 = <&sdiom0_pins>; |
| 412 | status = "okay"; |
| 413 | }; |
| 414 | |
| 415 | &uart6 { |
| 416 | pinctrl-names = "default"; |
| 417 | pinctrl-0 = <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>; |
| 418 | status = "okay"; |
| 419 | }; |
| 420 | |
| 421 | &spi2 { |
| 422 | status = "okay"; |
| 423 | assigned-clocks = <&cru CLK_SPI2>; |
| 424 | assigned-clock-rates = <200000000>; |
| 425 | pinctrl-names = "default"; |
| 426 | pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; |
| 427 | num-cs = <1>; |
| 428 | |
| 429 | pmic@0 { |
| 430 | compatible = "rockchip,rk806"; |
| 431 | spi-max-frequency = <1000000>; |
| 432 | reg = <0x0>; |
| 433 | |
| 434 | interrupt-parent = <&gpio0>; |
| 435 | interrupts = <7 IRQ_TYPE_LEVEL_LOW>; |
| 436 | |
| 437 | pinctrl-names = "default"; |
| 438 | pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, |
| 439 | <&rk806_dvs2_null>, <&rk806_dvs3_null>; |
| 440 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 441 | system-power-controller; |
| 442 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 443 | vcc1-supply = <&vcc5v0_sys>; |
| 444 | vcc2-supply = <&vcc5v0_sys>; |
| 445 | vcc3-supply = <&vcc5v0_sys>; |
| 446 | vcc4-supply = <&vcc5v0_sys>; |
| 447 | vcc5-supply = <&vcc5v0_sys>; |
| 448 | vcc6-supply = <&vcc5v0_sys>; |
| 449 | vcc7-supply = <&vcc5v0_sys>; |
| 450 | vcc8-supply = <&vcc5v0_sys>; |
| 451 | vcc9-supply = <&vcc5v0_sys>; |
| 452 | vcc10-supply = <&vcc5v0_sys>; |
| 453 | vcc11-supply = <&vcc_2v0_pldo_s3>; |
| 454 | vcc12-supply = <&vcc5v0_sys>; |
| 455 | vcc13-supply = <&vcc_1v1_nldo_s3>; |
| 456 | vcc14-supply = <&vcc_1v1_nldo_s3>; |
| 457 | vcca-supply = <&vcc5v0_sys>; |
| 458 | |
| 459 | gpio-controller; |
| 460 | #gpio-cells = <2>; |
| 461 | |
| 462 | rk806_dvs1_null: dvs1-null-pins { |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 463 | pins = "gpio_pwrctrl1"; |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 464 | function = "pin_fun0"; |
| 465 | }; |
| 466 | |
| 467 | rk806_dvs2_null: dvs2-null-pins { |
| 468 | pins = "gpio_pwrctrl2"; |
| 469 | function = "pin_fun0"; |
| 470 | }; |
| 471 | |
| 472 | rk806_dvs3_null: dvs3-null-pins { |
| 473 | pins = "gpio_pwrctrl3"; |
| 474 | function = "pin_fun0"; |
| 475 | }; |
| 476 | |
| 477 | regulators { |
| 478 | vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { |
| 479 | regulator-boot-on; |
| 480 | regulator-min-microvolt = <550000>; |
| 481 | regulator-max-microvolt = <950000>; |
| 482 | regulator-ramp-delay = <12500>; |
| 483 | regulator-name = "vdd_gpu_s0"; |
| 484 | regulator-enable-ramp-delay = <400>; |
| 485 | |
| 486 | regulator-state-mem { |
| 487 | regulator-off-in-suspend; |
| 488 | }; |
| 489 | }; |
| 490 | |
| 491 | vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { |
| 492 | regulator-always-on; |
| 493 | regulator-boot-on; |
| 494 | regulator-min-microvolt = <550000>; |
| 495 | regulator-max-microvolt = <950000>; |
| 496 | regulator-ramp-delay = <12500>; |
| 497 | regulator-name = "vdd_cpu_lit_s0"; |
| 498 | |
| 499 | regulator-state-mem { |
| 500 | regulator-off-in-suspend; |
| 501 | }; |
| 502 | }; |
| 503 | |
| 504 | vdd_log_s0: dcdc-reg3 { |
| 505 | regulator-always-on; |
| 506 | regulator-boot-on; |
| 507 | regulator-min-microvolt = <675000>; |
| 508 | regulator-max-microvolt = <750000>; |
| 509 | regulator-ramp-delay = <12500>; |
| 510 | regulator-name = "vdd_log_s0"; |
| 511 | |
| 512 | regulator-state-mem { |
| 513 | regulator-off-in-suspend; |
| 514 | regulator-suspend-microvolt = <750000>; |
| 515 | }; |
| 516 | }; |
| 517 | |
| 518 | vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { |
| 519 | regulator-always-on; |
| 520 | regulator-boot-on; |
| 521 | regulator-min-microvolt = <550000>; |
| 522 | regulator-max-microvolt = <950000>; |
| 523 | regulator-ramp-delay = <12500>; |
| 524 | regulator-name = "vdd_vdenc_s0"; |
| 525 | |
| 526 | regulator-state-mem { |
| 527 | regulator-off-in-suspend; |
| 528 | }; |
| 529 | }; |
| 530 | |
| 531 | vdd_ddr_s0: dcdc-reg5 { |
| 532 | regulator-always-on; |
| 533 | regulator-boot-on; |
| 534 | regulator-min-microvolt = <675000>; |
| 535 | regulator-max-microvolt = <900000>; |
| 536 | regulator-ramp-delay = <12500>; |
| 537 | regulator-name = "vdd_ddr_s0"; |
| 538 | |
| 539 | regulator-state-mem { |
| 540 | regulator-off-in-suspend; |
| 541 | regulator-suspend-microvolt = <850000>; |
| 542 | }; |
| 543 | }; |
| 544 | |
| 545 | vdd2_ddr_s3: dcdc-reg6 { |
| 546 | regulator-always-on; |
| 547 | regulator-boot-on; |
| 548 | regulator-name = "vdd2_ddr_s3"; |
| 549 | |
| 550 | regulator-state-mem { |
| 551 | regulator-on-in-suspend; |
| 552 | }; |
| 553 | }; |
| 554 | |
| 555 | vcc_2v0_pldo_s3: dcdc-reg7 { |
| 556 | regulator-always-on; |
| 557 | regulator-boot-on; |
| 558 | regulator-min-microvolt = <2000000>; |
| 559 | regulator-max-microvolt = <2000000>; |
| 560 | regulator-ramp-delay = <12500>; |
| 561 | regulator-name = "vdd_2v0_pldo_s3"; |
| 562 | |
| 563 | regulator-state-mem { |
| 564 | regulator-on-in-suspend; |
| 565 | regulator-suspend-microvolt = <2000000>; |
| 566 | }; |
| 567 | }; |
| 568 | |
| 569 | vcc_3v3_s3: dcdc-reg8 { |
| 570 | regulator-always-on; |
| 571 | regulator-boot-on; |
| 572 | regulator-min-microvolt = <3300000>; |
| 573 | regulator-max-microvolt = <3300000>; |
| 574 | regulator-name = "vcc_3v3_s3"; |
| 575 | |
| 576 | regulator-state-mem { |
| 577 | regulator-on-in-suspend; |
| 578 | regulator-suspend-microvolt = <3300000>; |
| 579 | }; |
| 580 | }; |
| 581 | |
| 582 | vddq_ddr_s0: dcdc-reg9 { |
| 583 | regulator-always-on; |
| 584 | regulator-boot-on; |
| 585 | regulator-name = "vddq_ddr_s0"; |
| 586 | |
| 587 | regulator-state-mem { |
| 588 | regulator-off-in-suspend; |
| 589 | }; |
| 590 | }; |
| 591 | |
| 592 | vcc_1v8_s3: dcdc-reg10 { |
| 593 | regulator-always-on; |
| 594 | regulator-boot-on; |
| 595 | regulator-min-microvolt = <1800000>; |
| 596 | regulator-max-microvolt = <1800000>; |
| 597 | regulator-name = "vcc_1v8_s3"; |
| 598 | |
| 599 | regulator-state-mem { |
| 600 | regulator-on-in-suspend; |
| 601 | regulator-suspend-microvolt = <1800000>; |
| 602 | }; |
| 603 | }; |
| 604 | |
| 605 | avcc_1v8_s0: pldo-reg1 { |
| 606 | regulator-always-on; |
| 607 | regulator-boot-on; |
| 608 | regulator-min-microvolt = <1800000>; |
| 609 | regulator-max-microvolt = <1800000>; |
| 610 | regulator-name = "avcc_1v8_s0"; |
| 611 | |
| 612 | regulator-state-mem { |
| 613 | regulator-off-in-suspend; |
| 614 | }; |
| 615 | }; |
| 616 | |
| 617 | vcc_1v8_s0: pldo-reg2 { |
| 618 | regulator-always-on; |
| 619 | regulator-boot-on; |
| 620 | regulator-min-microvolt = <1800000>; |
| 621 | regulator-max-microvolt = <1800000>; |
| 622 | regulator-name = "vcc_1v8_s0"; |
| 623 | |
| 624 | regulator-state-mem { |
| 625 | regulator-off-in-suspend; |
| 626 | regulator-suspend-microvolt = <1800000>; |
| 627 | }; |
| 628 | }; |
| 629 | |
| 630 | avdd_1v2_s0: pldo-reg3 { |
| 631 | regulator-always-on; |
| 632 | regulator-boot-on; |
| 633 | regulator-min-microvolt = <1200000>; |
| 634 | regulator-max-microvolt = <1200000>; |
| 635 | regulator-name = "avdd_1v2_s0"; |
| 636 | |
| 637 | regulator-state-mem { |
| 638 | regulator-off-in-suspend; |
| 639 | }; |
| 640 | }; |
| 641 | |
| 642 | vcc_3v3_s0: pldo-reg4 { |
| 643 | regulator-always-on; |
| 644 | regulator-boot-on; |
| 645 | regulator-min-microvolt = <3300000>; |
| 646 | regulator-max-microvolt = <3300000>; |
| 647 | regulator-ramp-delay = <12500>; |
| 648 | regulator-name = "vcc_3v3_s0"; |
| 649 | |
| 650 | regulator-state-mem { |
| 651 | regulator-off-in-suspend; |
| 652 | }; |
| 653 | }; |
| 654 | |
| 655 | vccio_sd_s0: pldo-reg5 { |
| 656 | regulator-always-on; |
| 657 | regulator-boot-on; |
| 658 | regulator-min-microvolt = <1800000>; |
| 659 | regulator-max-microvolt = <3300000>; |
| 660 | regulator-ramp-delay = <12500>; |
| 661 | regulator-name = "vccio_sd_s0"; |
| 662 | |
| 663 | regulator-state-mem { |
| 664 | regulator-off-in-suspend; |
| 665 | }; |
| 666 | }; |
| 667 | |
| 668 | pldo6_s3: pldo-reg6 { |
| 669 | regulator-always-on; |
| 670 | regulator-boot-on; |
| 671 | regulator-min-microvolt = <1800000>; |
| 672 | regulator-max-microvolt = <1800000>; |
| 673 | regulator-name = "pldo6_s3"; |
| 674 | |
| 675 | regulator-state-mem { |
| 676 | regulator-on-in-suspend; |
| 677 | regulator-suspend-microvolt = <1800000>; |
| 678 | }; |
| 679 | }; |
| 680 | |
| 681 | vdd_0v75_s3: nldo-reg1 { |
| 682 | regulator-always-on; |
| 683 | regulator-boot-on; |
| 684 | regulator-min-microvolt = <750000>; |
| 685 | regulator-max-microvolt = <750000>; |
| 686 | regulator-name = "vdd_0v75_s3"; |
| 687 | |
| 688 | regulator-state-mem { |
| 689 | regulator-on-in-suspend; |
| 690 | regulator-suspend-microvolt = <750000>; |
| 691 | }; |
| 692 | }; |
| 693 | |
| 694 | vdd_ddr_pll_s0: nldo-reg2 { |
| 695 | regulator-always-on; |
| 696 | regulator-boot-on; |
| 697 | regulator-min-microvolt = <850000>; |
| 698 | regulator-max-microvolt = <850000>; |
| 699 | regulator-name = "vdd_ddr_pll_s0"; |
| 700 | |
| 701 | regulator-state-mem { |
| 702 | regulator-off-in-suspend; |
| 703 | regulator-suspend-microvolt = <850000>; |
| 704 | }; |
| 705 | }; |
| 706 | |
| 707 | avdd_0v75_s0: nldo-reg3 { |
| 708 | regulator-always-on; |
| 709 | regulator-boot-on; |
| 710 | regulator-min-microvolt = <750000>; |
| 711 | regulator-max-microvolt = <750000>; |
| 712 | regulator-name = "avdd_0v75_s0"; |
| 713 | |
| 714 | regulator-state-mem { |
| 715 | regulator-off-in-suspend; |
| 716 | }; |
| 717 | }; |
| 718 | |
| 719 | vdd_0v85_s0: nldo-reg4 { |
| 720 | regulator-always-on; |
| 721 | regulator-boot-on; |
| 722 | regulator-min-microvolt = <850000>; |
| 723 | regulator-max-microvolt = <850000>; |
| 724 | regulator-name = "vdd_0v85_s0"; |
| 725 | |
| 726 | regulator-state-mem { |
| 727 | regulator-off-in-suspend; |
| 728 | }; |
| 729 | }; |
| 730 | |
| 731 | vdd_0v75_s0: nldo-reg5 { |
| 732 | regulator-always-on; |
| 733 | regulator-boot-on; |
| 734 | regulator-min-microvolt = <750000>; |
| 735 | regulator-max-microvolt = <750000>; |
| 736 | regulator-name = "vdd_0v75_s0"; |
| 737 | |
| 738 | regulator-state-mem { |
| 739 | regulator-off-in-suspend; |
| 740 | }; |
| 741 | }; |
| 742 | }; |
| 743 | }; |
| 744 | }; |
| 745 | |
| 746 | &uart2 { |
| 747 | pinctrl-0 = <&uart2m0_xfer>; |
| 748 | status = "okay"; |
| 749 | }; |
| 750 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 751 | &u2phy1 { |
| 752 | status = "okay"; |
| 753 | }; |
| 754 | |
| 755 | &u2phy1_otg { |
| 756 | status = "okay"; |
| 757 | }; |
| 758 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 759 | &u2phy2 { |
| 760 | status = "okay"; |
| 761 | }; |
| 762 | |
| 763 | &u2phy2_host { |
| 764 | /* connected to USB hub, which is powered by vcc5v0_sys */ |
| 765 | phy-supply = <&vcc5v0_sys>; |
| 766 | status = "okay"; |
| 767 | }; |
| 768 | |
| 769 | &u2phy3 { |
| 770 | status = "okay"; |
| 771 | }; |
| 772 | |
| 773 | &u2phy3_host { |
| 774 | phy-supply = <&vcc5v0_host>; |
| 775 | status = "okay"; |
| 776 | }; |
| 777 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 778 | &usbdp_phy1 { |
| 779 | status = "okay"; |
| 780 | }; |
| 781 | |
Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 782 | &usb_host0_ehci { |
| 783 | status = "okay"; |
| 784 | }; |
| 785 | |
| 786 | &usb_host0_ohci { |
| 787 | status = "okay"; |
| 788 | }; |
| 789 | |
| 790 | &usb_host1_ehci { |
| 791 | status = "okay"; |
| 792 | }; |
| 793 | |
| 794 | &usb_host1_ohci { |
| 795 | status = "okay"; |
| 796 | }; |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 797 | |
Tom Rini | 762f85b | 2024-07-20 11:15:10 -0600 | [diff] [blame] | 798 | &usb_host1_xhci { |
| 799 | dr_mode = "host"; |
| 800 | status = "okay"; |
| 801 | }; |
| 802 | |
Tom Rini | 93743d2 | 2024-04-01 09:08:13 -0400 | [diff] [blame] | 803 | &usb_host2_xhci { |
| 804 | status = "okay"; |
| 805 | }; |