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git01.mediatek.com / filogic / uboot / 0103212e48de4905fc1e79bf8f3cf7d0a4e577f3 / . / dts / upstream / src / arm64 / rockchip / rk3399-leez-p710.dts
blob: cb69e2145fa9400c84b8038c9ccd372224f14fb4 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Andy Yan <andy.yan@gmail.com>
4 */
5
6/dts-v1/;
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/pwm/pwm.h>
10#include "rk3399.dtsi"
11#include "rk3399-opp.dtsi"
12
13/ {
14 model = "Leez RK3399 P710";
15 compatible = "leez,p710", "rockchip,rk3399";
16
17 aliases {
Tom Rini93743d22024-04-01 09:08:13 -0400[diff] [blame]18 ethernet0 = &gmac;
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]19 mmc0 = &sdio0;
20 mmc1 = &sdmmc;
21 mmc2 = &sdhci;
22 };
23
24 chosen {
25 stdout-path = "serial2:1500000n8";
26 };
27
28 clkin_gmac: external-gmac-clock {
29 compatible = "fixed-clock";
30 clock-frequency = <125000000>;
31 clock-output-names = "clkin_gmac";
32 #clock-cells = <0>;
33 };
34
35 sdio_pwrseq: sdio-pwrseq {
36 compatible = "mmc-pwrseq-simple";
37 clocks = <&rk808 1>;
38 clock-names = "ext_clock";
39 pinctrl-names = "default";
40 pinctrl-0 = <&wifi_reg_on_h>;
41 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
42 };
43
44 dc5v_adp: dc5v-adp {
45 compatible = "regulator-fixed";
46 regulator-name = "dc5v_adapter";
47 regulator-always-on;
48 regulator-boot-on;
49 regulator-min-microvolt = <5000000>;
50 regulator-max-microvolt = <5000000>;
51 };
52
53 vcc3v3_lan: vcc3v3-lan {
54 compatible = "regulator-fixed";
55 regulator-name = "vcc3v3_lan";
56 regulator-always-on;
57 regulator-boot-on;
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 vin-supply = <&vcc3v3_sys>;
61 };
62
63 vcc3v3_sys: vcc3v3-sys {
64 compatible = "regulator-fixed";
65 regulator-name = "vcc3v3_sys";
66 regulator-always-on;
67 regulator-boot-on;
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 vin-supply = <&vcc5v0_sys>;
71 };
72
73 vcc5v0_host0: vcc5v0_host1: vcc5v0-host {
74 compatible = "regulator-fixed";
75 regulator-name = "vcc5v0_host";
76 regulator-boot-on;
77 regulator-always-on;
78 regulator-min-microvolt = <5500000>;
79 regulator-max-microvolt = <5500000>;
80 vin-supply = <&vcc5v0_sys>;
81 };
82
83 vcc5v0_host3: vcc5v0-host3 {
84 compatible = "regulator-fixed";
85 regulator-name = "vcc5v0_host3";
86 enable-active-high;
87 gpio = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&vcc5v0_host3_en>;
90 regulator-always-on;
91 vin-supply = <&vcc5v0_sys>;
92 };
93
94 vcc5v0_sys: vcc5v0-sys {
95 compatible = "regulator-fixed";
96 regulator-name = "vcc5v0_sys";
97 regulator-always-on;
98 regulator-boot-on;
99 regulator-min-microvolt = <5000000>;
100 regulator-max-microvolt = <5000000>;
101 vin-supply = <&dc5v_adp>;
102 };
103
104 vdd_log: vdd-log {
105 compatible = "pwm-regulator";
106 pwms = <&pwm2 0 25000 1>;
107 pwm-supply = <&vcc5v0_sys>;
108 regulator-name = "vdd_log";
109 regulator-always-on;
110 regulator-boot-on;
111 regulator-min-microvolt = <800000>;
112 regulator-max-microvolt = <1400000>;
113 };
114};
115
116&cpu_l0 {
117 cpu-supply = <&vdd_cpu_l>;
118};
119
120&cpu_l1 {
121 cpu-supply = <&vdd_cpu_l>;
122};
123
124&cpu_l2 {
125 cpu-supply = <&vdd_cpu_l>;
126};
127
128&cpu_l3 {
129 cpu-supply = <&vdd_cpu_l>;
130};
131
132&cpu_b0 {
133 cpu-supply = <&vdd_cpu_b>;
134};
135
136&cpu_b1 {
137 cpu-supply = <&vdd_cpu_b>;
138};
139
140&emmc_phy {
141 status = "okay";
142};
143
144&gmac {
145 assigned-clocks = <&cru SCLK_RMII_SRC>;
146 assigned-clock-parents = <&clkin_gmac>;
147 clock_in_out = "input";
148 phy-supply = <&vcc3v3_lan>;
149 phy-mode = "rgmii";
150 pinctrl-names = "default";
151 pinctrl-0 = <&rgmii_pins>;
152 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
153 snps,reset-active-low;
154 snps,reset-delays-us = <0 10000 50000>;
155 tx_delay = <0x28>;
156 rx_delay = <0x11>;
157 status = "okay";
158};
159
160&gpu {
161 mali-supply = <&vdd_gpu>;
162 status = "okay";
163};
164
165&hdmi {
166 ddc-i2c-bus = <&i2c7>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&hdmi_cec>;
169 status = "okay";
170};
171
172&hdmi_sound {
173 status = "okay";
174};
175
176&i2c0 {
177 clock-frequency = <400000>;
178 i2c-scl-rising-time-ns = <168>;
179 i2c-scl-falling-time-ns = <4>;
180 status = "okay";
181
182 rk808: pmic@1b {
183 compatible = "rockchip,rk808";
184 reg = <0x1b>;
185 interrupt-parent = <&gpio1>;
186 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
187 #clock-cells = <1>;
188 clock-output-names = "xin32k", "rk808-clkout2";
189 pinctrl-names = "default";
190 pinctrl-0 = <&pmic_int_l>;
191 rockchip,system-power-controller;
192 wakeup-source;
193
194 vcc1-supply = <&vcc5v0_sys>;
195 vcc2-supply = <&vcc5v0_sys>;
196 vcc3-supply = <&vcc5v0_sys>;
197 vcc4-supply = <&vcc5v0_sys>;
198 vcc6-supply = <&vcc5v0_sys>;
199 vcc7-supply = <&vcc5v0_sys>;
200 vcc8-supply = <&vcc3v3_sys>;
201 vcc9-supply = <&vcc5v0_sys>;
202 vcc10-supply = <&vcc5v0_sys>;
203 vcc11-supply = <&vcc5v0_sys>;
204 vcc12-supply = <&vcc3v3_sys>;
205 vddio-supply = <&vcc_1v8>;
206
207 regulators {
208 vdd_center: DCDC_REG1 {
209 regulator-name = "vdd_center";
210 regulator-always-on;
211 regulator-boot-on;
212 regulator-min-microvolt = <750000>;
213 regulator-max-microvolt = <1350000>;
214 regulator-ramp-delay = <6001>;
215 regulator-state-mem {
216 regulator-off-in-suspend;
217 };
218 };
219
220 vdd_cpu_l: DCDC_REG2 {
221 regulator-name = "vdd_cpu_l";
222 regulator-always-on;
223 regulator-boot-on;
224 regulator-min-microvolt = <750000>;
225 regulator-max-microvolt = <1350000>;
226 regulator-ramp-delay = <6001>;
227 regulator-state-mem {
228 regulator-off-in-suspend;
229 };
230 };
231
232 vcc_ddr: DCDC_REG3 {
233 regulator-name = "vcc_ddr";
234 regulator-always-on;
235 regulator-boot-on;
236 regulator-state-mem {
237 regulator-on-in-suspend;
238 };
239 };
240
241 vcc_1v8: DCDC_REG4 {
242 regulator-name = "vcc_1v8";
243 regulator-always-on;
244 regulator-boot-on;
245 regulator-min-microvolt = <1800000>;
246 regulator-max-microvolt = <1800000>;
247 regulator-state-mem {
248 regulator-on-in-suspend;
249 regulator-suspend-microvolt = <1800000>;
250 };
251 };
252
253 vcc1v8_dvp: LDO_REG1 {
254 regulator-name = "vcc1v8_dvp";
255 regulator-always-on;
256 regulator-boot-on;
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <1800000>;
259 regulator-state-mem {
260 regulator-off-in-suspend;
261 };
262 };
263
264 vcc1v8_hdmi: LDO_REG2 {
265 regulator-name = "vcc1v8_hdmi";
266 regulator-always-on;
267 regulator-boot-on;
268 regulator-min-microvolt = <1800000>;
269 regulator-max-microvolt = <1800000>;
270 regulator-state-mem {
271 regulator-off-in-suspend;
272 };
273 };
274
275 vcca_1v8: LDO_REG3 {
276 regulator-name = "vcca_1v8";
277 regulator-always-on;
278 regulator-boot-on;
279 regulator-min-microvolt = <1800000>;
280 regulator-max-microvolt = <1800000>;
281 regulator-state-mem {
282 regulator-on-in-suspend;
283 regulator-suspend-microvolt = <1800000>;
284 };
285 };
286
287 vccio_sd: LDO_REG4 {
288 regulator-name = "vccio_sd";
289 regulator-always-on;
290 regulator-boot-on;
291 regulator-min-microvolt = <3000000>;
292 regulator-max-microvolt = <3000000>;
293 regulator-state-mem {
294 regulator-on-in-suspend;
295 regulator-suspend-microvolt = <3000000>;
296 };
297 };
298
299 vcca3v0_codec: LDO_REG5 {
300 regulator-name = "vcca3v0_codec";
301 regulator-always-on;
302 regulator-boot-on;
303 regulator-min-microvolt = <3000000>;
304 regulator-max-microvolt = <3000000>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
307 };
308 };
309
310 vcc_1v5: LDO_REG6 {
311 regulator-name = "vcc_1v5";
312 regulator-always-on;
313 regulator-boot-on;
314 regulator-min-microvolt = <1500000>;
315 regulator-max-microvolt = <1500000>;
316 regulator-state-mem {
317 regulator-on-in-suspend;
318 regulator-suspend-microvolt = <1500000>;
319 };
320 };
321
322 vcc0v9_hdmi: LDO_REG7 {
323 regulator-name = "vcc0v9_hdmi";
324 regulator-always-on;
325 regulator-boot-on;
326 regulator-min-microvolt = <900000>;
327 regulator-max-microvolt = <900000>;
328 regulator-state-mem {
329 regulator-off-in-suspend;
330 };
331 };
332
333 vcc_3v0: LDO_REG8 {
334 regulator-name = "vcc_3v0";
335 regulator-always-on;
336 regulator-boot-on;
337 regulator-min-microvolt = <3000000>;
338 regulator-max-microvolt = <3000000>;
339 regulator-state-mem {
340 regulator-on-in-suspend;
341 regulator-suspend-microvolt = <3000000>;
342 };
343 };
344 };
345 };
346
347 vdd_cpu_b: regulator@40 {
348 compatible = "silergy,syr827";
349 reg = <0x40>;
350 fcs,suspend-voltage-selector = <1>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&vsel1_pin>;
353 regulator-name = "vdd_cpu_b";
354 regulator-min-microvolt = <712500>;
355 regulator-max-microvolt = <1500000>;
356 regulator-ramp-delay = <1000>;
357 regulator-always-on;
358 regulator-boot-on;
359 vin-supply = <&vcc5v0_sys>;
360
361 regulator-state-mem {
362 regulator-off-in-suspend;
363 };
364 };
365
366 vdd_gpu: regulator@41 {
367 compatible = "silergy,syr828";
368 reg = <0x41>;
369 fcs,suspend-voltage-selector = <1>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&vsel2_pin>;
372 regulator-name = "vdd_gpu";
373 regulator-min-microvolt = <712500>;
374 regulator-max-microvolt = <1500000>;
375 regulator-ramp-delay = <1000>;
376 regulator-always-on;
377 regulator-boot-on;
378 vin-supply = <&vcc5v0_sys>;
379
380 regulator-state-mem {
381 regulator-off-in-suspend;
382 };
383 };
384};
385
386&i2c1 {
387 i2c-scl-rising-time-ns = <300>;
388 i2c-scl-falling-time-ns = <15>;
389 status = "okay";
390};
391
392&i2c3 {
393 i2c-scl-rising-time-ns = <450>;
394 i2c-scl-falling-time-ns = <15>;
395 status = "okay";
396};
397
398&i2c4 {
399 i2c-scl-rising-time-ns = <600>;
400 i2c-scl-falling-time-ns = <20>;
401 status = "okay";
402};
403
404&i2c7 {
405 status = "okay";
406};
407
408&i2s0 {
409 rockchip,playback-channels = <8>;
410 rockchip,capture-channels = <8>;
411 status = "okay";
412};
413
414&i2s1 {
415 rockchip,playback-channels = <2>;
416 rockchip,capture-channels = <2>;
417 status = "okay";
418};
419
420&i2s2 {
421 status = "okay";
422};
423
424&io_domains {
425 status = "okay";
426
427 bt656-supply = <&vcc1v8_dvp>;
428 audio-supply = <&vcc_1v8>;
429 sdmmc-supply = <&vccio_sd>;
430 gpio1830-supply = <&vcc_3v0>;
431};
432
433&pmu_io_domains {
434 status = "okay";
435 pmu1830-supply = <&vcc_3v0>;
436};
437
438&pinctrl {
439 bt {
440 bt_reg_on_h: bt-reg-on-h {
441 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
442 };
443
444 bt_host_wake_l: bt-host-wake-l {
445 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
446 };
447
448 bt_wake_l: bt-wake-l {
449 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
450 };
451 };
452
453 pmic {
454 pmic_int_l: pmic-int-l {
455 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
456 };
457
458 vsel1_pin: vsel1-pin {
459 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
460 };
461
462 vsel2_pin: vsel2-pin {
463 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
464 };
465 };
466
467 usb2 {
468 vcc5v0_host3_en: vcc5v0-host3-en {
469 rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
470 };
471 };
472
473 wifi {
474 wifi_reg_on_h: wifi-reg-on-h {
475 rockchip,pins =
476 <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
477 };
478
479 wifi_host_wake_l: wifi-host-wake-l {
480 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
481 };
482 };
483};
484
485&pwm2 {
486 status = "okay";
487};
488
489&saradc {
490 status = "okay";
491
492 vref-supply = <&vcc_1v8>;
493};
494
495&sdio0 {
496 #address-cells = <1>;
497 #size-cells = <0>;
498 bus-width = <4>;
499 clock-frequency = <50000000>;
500 cap-sdio-irq;
501 cap-sd-highspeed;
502 keep-power-in-suspend;
503 mmc-pwrseq = <&sdio_pwrseq>;
504 non-removable;
505 pinctrl-names = "default";
506 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
507 sd-uhs-sdr104;
508 status = "okay";
509
510 brcmf: wifi@1 {
511 compatible = "brcm,bcm4329-fmac";
512 reg = <1>;
513 interrupt-parent = <&gpio0>;
514 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
515 interrupt-names = "host-wake";
516 pinctrl-names = "default";
517 pinctrl-0 = <&wifi_host_wake_l>;
518 };
519};
520
521&sdhci {
522 bus-width = <8>;
523 mmc-hs400-1_8v;
524 mmc-hs400-enhanced-strobe;
525 non-removable;
526 status = "okay";
527};
528
529&sdmmc {
530 bus-width = <4>;
531 cap-mmc-highspeed;
532 cap-sd-highspeed;
533 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
534 disable-wp;
535 max-frequency = <150000000>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>;
538 status = "okay";
539};
540
541&tcphy0 {
542 status = "okay";
543};
544
545&tcphy1 {
546 status = "okay";
547};
548
549&tsadc {
550 status = "okay";
551
552 /* tshut mode 0:CRU 1:GPIO */
553 rockchip,hw-tshut-mode = <1>;
554 /* tshut polarity 0:LOW 1:HIGH */
555 rockchip,hw-tshut-polarity = <1>;
556};
557
558&u2phy0 {
559 status = "okay";
560
561 u2phy0_otg: otg-port {
562 status = "okay";
563 };
564
565 u2phy0_host: host-port {
566 phy-supply = <&vcc5v0_host0>;
567 status = "okay";
568 };
569};
570
571&u2phy1 {
572 status = "okay";
573
574 u2phy1_otg: otg-port {
575 status = "okay";
576 };
577
578 u2phy1_host: host-port {
579 phy-supply = <&vcc5v0_host1>;
580 status = "okay";
581 };
582};
583
584&uart0 {
585 pinctrl-names = "default";
586 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
587 status = "okay";
588
589 bluetooth {
590 compatible = "brcm,bcm43438-bt";
591 clocks = <&rk808 1>;
592 clock-names = "ext_clock";
593 device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
594 host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
595 shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
598 };
599};
600
601&uart2 {
602 status = "okay";
603};
604
605&usb_host0_ehci {
606 status = "okay";
607};
608
609&usb_host0_ohci {
610 status = "okay";
611};
612
613&usb_host1_ehci {
614 status = "okay";
615};
616
617&usb_host1_ohci {
618 status = "okay";
619};
620
621&usbdrd3_0 {
622 status = "okay";
623};
624
625&usbdrd_dwc3_0 {
626 status = "okay";
627 dr_mode = "otg";
628};
629
630&usbdrd3_1 {
631 status = "okay";
632};
633
634&usbdrd_dwc3_1 {
635 status = "okay";
636 dr_mode = "host";
637};
638
639&vopb {
640 status = "okay";
641};
642
643&vopb_mmu {
644 status = "okay";
645};
646
647&vopl {
648 status = "okay";
649};
650
651&vopl_mmu {
652 status = "okay";
653};