| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Freescale IRQSTEER Interrupt Multiplexer |
| 8 | |
| 9 | maintainers: |
| 10 | - Lucas Stach <l.stach@pengutronix.de> |
| 11 | |
| 12 | properties: |
| 13 | compatible: |
| 14 | oneOf: |
| 15 | - const: fsl,imx-irqsteer |
| 16 | - items: |
| 17 | - const: fsl,imx8m-irqsteer |
| 18 | - const: fsl,imx-irqsteer |
| 19 | |
| 20 | reg: |
| 21 | maxItems: 1 |
| 22 | |
| 23 | interrupts: |
| 24 | description: | |
| 25 | should contain the up to 8 parent interrupt lines used to multiplex |
| 26 | the input interrupts. They should be specified sequentially from |
| 27 | output 0 to 7. |
| 28 | items: |
| 29 | - description: output interrupt 0 |
| 30 | - description: output interrupt 1 |
| 31 | - description: output interrupt 2 |
| 32 | - description: output interrupt 3 |
| 33 | - description: output interrupt 4 |
| 34 | - description: output interrupt 5 |
| 35 | - description: output interrupt 6 |
| 36 | - description: output interrupt 7 |
| 37 | minItems: 1 |
| 38 | |
| 39 | clocks: |
| 40 | maxItems: 1 |
| 41 | |
| 42 | clock-names: |
| 43 | const: ipg |
| 44 | |
| 45 | interrupt-controller: true |
| 46 | |
| 47 | "#interrupt-cells": |
| 48 | const: 1 |
| 49 | |
| 50 | fsl,channel: |
| 51 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 52 | description: | |
| 53 | u32 value representing the output channel that all input IRQs should be |
| 54 | steered into. |
| 55 | |
| 56 | fsl,num-irqs: |
| 57 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 58 | description: | |
| 59 | u32 value representing the number of input interrupts of this channel, |
| 60 | should be multiple of 32 input interrupts and up to 512 interrupts. |
| 61 | |
| 62 | required: |
| 63 | - compatible |
| 64 | - reg |
| 65 | - interrupts |
| 66 | - clocks |
| 67 | - clock-names |
| 68 | - interrupt-controller |
| 69 | - "#interrupt-cells" |
| 70 | - fsl,channel |
| 71 | - fsl,num-irqs |
| 72 | |
| 73 | additionalProperties: false |
| 74 | |
| 75 | examples: |
| 76 | - | |
| 77 | #include <dt-bindings/clock/imx8mq-clock.h> |
| 78 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 79 | |
| 80 | interrupt-controller@32e2d000 { |
| 81 | compatible = "fsl,imx-irqsteer"; |
| 82 | reg = <0x32e2d000 0x1000>; |
| 83 | interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; |
| 84 | clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>; |
| 85 | clock-names = "ipg"; |
| 86 | fsl,channel = <0>; |
| 87 | fsl,num-irqs = <64>; |
| 88 | interrupt-controller; |
| 89 | #interrupt-cells = <1>; |
| 90 | }; |