Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 00b5a744745f7cb8201e0675db68a4b2f5f69267 / . / configs / j721e_hs_evm_a72_defconfig
blob: a1c8a374aea5ebc8174703dfb83f2e28e0d255ac [file] [log] [blame]
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
3CONFIG_TI_SECURE_DEVICE=y
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x2000000
5CONFIG_SYS_MALLOC_F_LEN=0x8000
Vaishnav Achath00b5a742022-05-09 11:50:17 +0530[diff] [blame^]6CONFIG_SPL_GPIO=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=2
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]10CONFIG_SOC_K3_J721E=y
11CONFIG_TARGET_J721E_A72_EVM=y
12CONFIG_ENV_SIZE=0x20000
13CONFIG_ENV_OFFSET=0x680000
Vaishnav Achath00b5a742022-05-09 11:50:17 +0530[diff] [blame^]14CONFIG_DM_GPIO=y
Tom Rini6c75e632020-06-16 19:06:29 -0400[diff] [blame]15CONFIG_SPL_DM_SPI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]16CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]17CONFIG_SPL_TEXT_BASE=0x80080000
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]18CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]19CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]20CONFIG_SPL_DRIVERS_MISC=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]21CONFIG_SPL_STACK_R_ADDR=0x82000000
Tom Rinid49f5822020-02-28 13:28:38 -0500[diff] [blame]22CONFIG_ENV_OFFSET_REDUND=0x700000
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]23CONFIG_SPL_FS_FAT=y
24CONFIG_SPL_LIBDISK_SUPPORT=y
25CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]26CONFIG_SPL_SPI=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]27# CONFIG_PSCI_RESET is not set
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]28CONFIG_DISTRO_DEFAULTS=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]29CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
30CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]31# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]32CONFIG_SPL_LOAD_FIT=y
Peng Fan54590592020-07-06 15:35:01 +0800[diff] [blame]33CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
Simon Glass5d144112020-07-19 13:56:10 -0600[diff] [blame]34# CONFIG_USE_SPL_FIT_GENERATOR is not set
Vaishnav Achath00b5a742022-05-09 11:50:17 +0530[diff] [blame^]35CONFIG_OF_BOARD_SETUP=y
Aswath Govindraju24802b62022-02-22 10:49:05 +0530[diff] [blame]36CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit"
Roger Quadrosf067d462020-10-30 15:00:24 +0200[diff] [blame]37CONFIG_LOGLEVEL=7
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]38CONFIG_SPL_MAX_SIZE=0xc0000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]39CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
40CONFIG_SPL_BSS_START_ADDR=0x80a00000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]41CONFIG_SPL_BSS_MAX_SIZE=0x80000
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]42CONFIG_SPL_BOARD_INIT=y
43CONFIG_SPL_SYS_MALLOC_SIMPLE=y
44CONFIG_SPL_STACK_R=y
Tom Rini166e3222022-05-27 12:48:32 -0400[diff] [blame]45CONFIG_SYS_SPL_MALLOC=y
46CONFIG_SYS_SPL_MALLOC_SIZE=0x800000
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]47CONFIG_SPL_ENV_SUPPORT=y
Tom Rinia4f2ab92022-05-13 17:12:35 -0400[diff] [blame]48CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]49CONFIG_SPL_I2C=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]50CONFIG_SPL_DM_MAILBOX=y
Vaishnav Achath00b5a742022-05-09 11:50:17 +0530[diff] [blame^]51CONFIG_SPL_MTD_SUPPORT=y
Lukasz Majewski76f442982020-06-04 23:11:53 +0800[diff] [blame]52CONFIG_SPL_DM_SPI_FLASH=y
Vaishnav Achath00b5a742022-05-09 11:50:17 +0530[diff] [blame^]53CONFIG_SPL_NOR_SUPPORT=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]54CONFIG_SPL_DM_RESET=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]55CONFIG_SPL_POWER_DOMAIN=y
Vignesh Raghavendra88c08222020-02-04 11:09:59 +0530[diff] [blame]56# CONFIG_SPL_SPI_FLASH_TINY is not set
57CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]58CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -0400[diff] [blame]59CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]60CONFIG_SPL_YMODEM_SUPPORT=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]61CONFIG_SYS_MAXARGS=64
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]62CONFIG_CMD_ASKENV=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]63CONFIG_CMD_DFU=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]64# CONFIG_CMD_FLASH is not set
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]65CONFIG_CMD_GPT=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]66CONFIG_CMD_I2C=y
67CONFIG_CMD_MMC=y
68CONFIG_CMD_MTD=y
69CONFIG_CMD_REMOTEPROC=y
70CONFIG_CMD_UFS=y
71CONFIG_CMD_USB=y
72CONFIG_CMD_USB_MASS_STORAGE=y
73# CONFIG_CMD_SETEXPR is not set
74CONFIG_CMD_TIME=y
75CONFIG_CMD_EXT4_WRITE=y
76CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus"
Vignesh Raghavendra88c08222020-02-04 11:09:59 +0530[diff] [blame]77CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)"
78CONFIG_CMD_UBI=y
Tom Rinif221b3c2022-03-18 12:47:42 +0000[diff] [blame]79CONFIG_MMC_SPEED_MODE_SET=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]80# CONFIG_ISO_PARTITION is not set
81# CONFIG_SPL_EFI_PARTITION is not set
82CONFIG_OF_CONTROL=y
83CONFIG_SPL_OF_CONTROL=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]84CONFIG_SPL_MULTI_DTB_FIT=y
85CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]86CONFIG_ENV_OVERWRITE=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]87CONFIG_ENV_IS_IN_MMC=y
88CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]89CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]90CONFIG_SYS_MMC_ENV_PART=1
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]91CONFIG_NET_RANDOM_ETHADDR=y
92CONFIG_DM=y
93CONFIG_SPL_DM=y
94CONFIG_SPL_DM_SEQ_ALIAS=y
95CONFIG_REGMAP=y
96CONFIG_SPL_REGMAP=y
97CONFIG_SYSCON=y
Vaishnav Achath00b5a742022-05-09 11:50:17 +0530[diff] [blame^]98CONFIG_SPL_SYSCON=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]99CONFIG_SPL_OF_TRANSLATE=y
100CONFIG_CLK=y
101CONFIG_SPL_CLK=y
102CONFIG_CLK_TI_SCI=y
103CONFIG_DFU_MMC=y
104CONFIG_DFU_RAM=y
105CONFIG_DFU_SF=y
106CONFIG_DMA_CHANNELS=y
107CONFIG_TI_K3_NAVSS_UDMA=y
108CONFIG_USB_FUNCTION_FASTBOOT=y
109CONFIG_FASTBOOT_BUF_ADDR=0x82000000
110CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
111CONFIG_FASTBOOT_FLASH=y
112CONFIG_FASTBOOT_FLASH_MMC_DEV=0
113CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
114CONFIG_TI_SCI_PROTOCOL=y
115CONFIG_DM_I2C=y
116CONFIG_SYS_I2C_OMAP24XX=y
117CONFIG_DM_MAILBOX=y
118CONFIG_K3_SEC_PROXY=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]119CONFIG_MMC_SDHCI=y
120CONFIG_MMC_SDHCI_ADMA=y
121CONFIG_SPL_MMC_SDHCI_ADMA=y
122CONFIG_MMC_SDHCI_AM654=y
123CONFIG_MTD=y
124CONFIG_DM_MTD=y
125CONFIG_MTD_NOR_FLASH=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]126CONFIG_CFI_FLASH=y
127CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
128CONFIG_FLASH_CFI_MTD=y
129CONFIG_SYS_FLASH_CFI=y
130CONFIG_HBMC_AM654=y
Patrick Delaunay1576abf2022-01-04 14:24:00 +0100[diff] [blame]131CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]132CONFIG_DM_SPI_FLASH=y
133CONFIG_SPI_FLASH_STMICRO=y
Vignesh Raghavendra88c08222020-02-04 11:09:59 +0530[diff] [blame]134# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
135CONFIG_SPI_FLASH_MTD=y
Dan Murphy8b8d73a2020-05-04 16:14:39 -0500[diff] [blame]136CONFIG_PHY_TI_DP83867=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]137CONFIG_PHY_FIXED=y
138CONFIG_DM_ETH=y
139CONFIG_TI_AM65_CPSW_NUSS=y
140CONFIG_PINCTRL=y
141# CONFIG_PINCTRL_GENERIC is not set
142CONFIG_SPL_PINCTRL=y
143# CONFIG_SPL_PINCTRL_GENERIC is not set
144CONFIG_PINCTRL_SINGLE=y
145CONFIG_POWER_DOMAIN=y
146CONFIG_TI_SCI_POWER_DOMAIN=y
147CONFIG_RAM=y
148CONFIG_REMOTEPROC_TI_K3_DSP=y
149CONFIG_REMOTEPROC_TI_K3_R5F=y
150CONFIG_DM_RESET=y
151CONFIG_RESET_TI_SCI=y
152CONFIG_SCSI=y
153CONFIG_DM_SCSI=y
154CONFIG_DM_SERIAL=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]155CONFIG_SOC_DEVICE=y
156CONFIG_SOC_DEVICE_TI_K3=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]157CONFIG_SOC_TI=y
158CONFIG_SPI=y
159CONFIG_DM_SPI=y
160CONFIG_CADENCE_QSPI=y
Tom Rini3fb5b2f2022-03-30 18:07:23 -0400[diff] [blame]161CONFIG_HAS_CQSPI_REF_CLK=y
162CONFIG_CQSPI_REF_CLK=133333333
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]163CONFIG_SYSRESET=y
164CONFIG_SPL_SYSRESET=y
165CONFIG_SYSRESET_TI_SCI=y
166CONFIG_USB=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]167CONFIG_DM_USB_GADGET=y
168CONFIG_SPL_DM_USB_GADGET=y
169CONFIG_USB_XHCI_HCD=y
170CONFIG_USB_CDNS3=y
171CONFIG_USB_CDNS3_GADGET=y
172CONFIG_USB_CDNS3_HOST=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]173CONFIG_USB_GADGET=y
174CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
175CONFIG_USB_GADGET_VENDOR_NUM=0x0451
176CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
177CONFIG_UFS=y
178CONFIG_CADENCE_UFS=y
179CONFIG_TI_J721E_UFS=y
Andrew F. Davis74ebb782020-01-10 14:35:23 -0500[diff] [blame]180CONFIG_OF_LIBFDT_OVERLAY=y