| Masahiro Yamada | 1fe65d3 | 2015-09-22 00:27:41 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <spl.h> |
| 9 | #include <linux/io.h> |
| 10 | #include <mach/init.h> |
| 11 | #include <mach/sc-regs.h> |
| 12 | |
| 13 | int proxstream2_early_clk_init(const struct uniphier_board_data *bd) |
| 14 | { |
| 15 | u32 tmp; |
| 16 | |
| 17 | /* deassert reset */ |
| 18 | if (spl_boot_device() != BOOT_DEVICE_NAND) { |
| 19 | tmp = readl(SC_RSTCTRL); |
| 20 | tmp &= ~SC_RSTCTRL_NRST_NAND; |
| 21 | writel(tmp, SC_RSTCTRL); |
| 22 | }; |
| 23 | |
| 24 | tmp = readl(SC_RSTCTRL4); |
| 25 | tmp |= SC_RSTCTRL4_NRST_UMCSB | SC_RSTCTRL4_NRST_UMCA2 | |
| 26 | SC_RSTCTRL4_NRST_UMCA1 | SC_RSTCTRL4_NRST_UMCA0 | |
| 27 | SC_RSTCTRL4_NRST_UMC32 | SC_RSTCTRL4_NRST_UMC31 | |
| 28 | SC_RSTCTRL4_NRST_UMC30; |
| 29 | writel(tmp, SC_RSTCTRL4); |
| 30 | readl(SC_RSTCTRL4); /* dummy read */ |
| 31 | |
| 32 | /* privide clocks */ |
| 33 | tmp = readl(SC_CLKCTRL); |
| 34 | tmp |= SC_CLKCTRL_CEN_SBC | SC_CLKCTRL_CEN_PERI; |
| 35 | writel(tmp, SC_CLKCTRL); |
| 36 | |
| 37 | tmp = readl(SC_CLKCTRL4); |
| 38 | tmp |= SC_CLKCTRL4_CEN_UMCSB | SC_CLKCTRL4_CEN_UMC2 | |
| 39 | SC_CLKCTRL4_CEN_UMC1 | SC_CLKCTRL4_CEN_UMC0; |
| 40 | writel(tmp, SC_CLKCTRL4); |
| 41 | readl(SC_CLKCTRL4); /* dummy read */ |
| 42 | |
| 43 | return 0; |
| 44 | } |