| Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2014 - 2015 Xilinx, Inc. |
| 3 | * Michal Simek <michal.simek@xilinx.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #ifndef _ASM_ARCH_SYS_PROTO_H |
| 9 | #define _ASM_ARCH_SYS_PROTO_H |
| 10 | |
| Michal Simek | c68918e | 2015-07-23 12:03:55 +0200 | [diff] [blame] | 11 | /* Setup clk for network */ |
| 12 | static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate) |
| 13 | { |
| 14 | } |
| 15 | |
| Michal Simek | 72e9904 | 2015-11-05 17:06:29 +0100 | [diff] [blame] | 16 | int zynq_sdhci_init(phys_addr_t regbase); |
| Michal Simek | f2e373f | 2015-07-22 09:27:11 +0200 | [diff] [blame] | 17 | int zynq_slcr_get_mio_pin_status(const char *periph); |
| Michal Simek | 04b7e62 | 2015-01-15 10:01:51 +0100 | [diff] [blame] | 18 | |
| 19 | unsigned int zynqmp_get_silicon_version(void); |
| 20 | |
| 21 | #endif /* _ASM_ARCH_SYS_PROTO_H */ |