blob: 28ea4f2a481dea61e513ef5956d5724bb1413c90 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +02002
Tom Rini2aaa27d2019-01-22 17:09:26 -05003MEMORY { .spl_mem : ORIGIN = IMAGE_TEXT_BASE, \
4 LENGTH = IMAGE_MAX_SIZE }
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +02005MEMORY { .bss_mem : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
6 LENGTH = CONFIG_SPL_BSS_MAX_SIZE }
7
8OUTPUT_ARCH(mips)
9ENTRY(_start)
10SECTIONS
11{
12 . = 0x00000000;
13
14 . = ALIGN(4);
15 .text : {
16 *(.text*)
17 } > .spl_mem
18
19 . = ALIGN(4);
20 .rodata : {
21 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
22 } > .spl_mem
23
24 . = ALIGN(4);
25 .data : {
26 *(SORT_BY_ALIGNMENT(.data*))
27 *(SORT_BY_ALIGNMENT(.sdata*))
28 } > .spl_mem
29
developer25678a02020-04-21 09:28:37 +020030#if defined(CONFIG_SPL_DM) || defined(CONFIG_SPL_LOADER_SUPPORT)
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020031 . = ALIGN(4);
32 .u_boot_list : {
33 KEEP(*(SORT(.u_boot_list*)));
34 } > .spl_mem
35#endif
36
37 . = ALIGN(4);
38 __image_copy_end = .;
39
developerfa8f3302020-04-21 09:28:36 +020040 _image_binary_end = .;
41
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020042 .bss (NOLOAD) : {
43 __bss_start = .;
44 *(.bss*)
45 *(.sbss*)
46 *(COMMON)
47 . = ALIGN(4);
48 __bss_end = .;
49 } > .bss_mem
50
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +010051 /* These mark the ABI of U-Boot for debuggers. */
52 .mdebug.abi32 : {
53 KEEP(*(.mdebug.abi32))
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020054 }
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +010055 .mdebug.abi64 : {
56 KEEP(*(.mdebug.abi64))
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020057 }
58
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +010059 /* This is the MIPS specific mdebug section. */
60 .mdebug : { *(.mdebug) }
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020061
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +010062 /* Stabs debugging sections. */
63 .stab 0 : { *(.stab) }
64 .stabstr 0 : { *(.stabstr) }
65 .stab.excl 0 : { *(.stab.excl) }
66 .stab.exclstr 0 : { *(.stab.exclstr) }
67 .stab.index 0 : { *(.stab.index) }
68 .stab.indexstr 0 : { *(.stab.indexstr) }
69 .comment 0 : { *(.comment) }
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020070
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +010071 /*
72 * DWARF debug sections.
73 * Symbols in the DWARF debugging sections are relative to
74 * the beginning of the section so we begin them at 0.
75 */
76 /* DWARF 1 */
77 .debug 0 : { *(.debug) }
78 .line 0 : { *(.line) }
79 /* GNU DWARF 1 extensions */
80 .debug_srcinfo 0 : { *(.debug_srcinfo) }
81 .debug_sfnames 0 : { *(.debug_sfnames) }
82 /* DWARF 1.1 and DWARF 2 */
83 .debug_aranges 0 : { *(.debug_aranges) }
84 .debug_pubnames 0 : { *(.debug_pubnames) }
85 /* DWARF 2 */
86 .debug_info 0 : {
87 *(.debug_info
88 .gnu.linkonce.wi.*)
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +020089 }
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +010090 .debug_abbrev 0 : { *(.debug_abbrev) }
91 .debug_line 0 : { *(.debug_line) }
92 .debug_frame 0 : { *(.debug_frame) }
93 .debug_str 0 : { *(.debug_str) }
94 .debug_loc 0 : { *(.debug_loc) }
95 .debug_macinfo 0 : { *(.debug_macinfo) }
96 .debug_pubtypes 0 : { *(.debug_pubtypes) }
97 /* DWARF 3 */
98 .debug_ranges 0 : { *(.debug_ranges) }
99 /* SGI/MIPS DWARF 2 extensions */
100 .debug_weaknames 0 : { *(.debug_weaknames) }
101 .debug_funcnames 0 : { *(.debug_funcnames) }
102 .debug_typenames 0 : { *(.debug_typenames) }
103 .debug_varnames 0 : { *(.debug_varnames) }
104 /* GNU DWARF 2 extensions */
105 .debug_gnu_pubnames 0 : { *(.debug_gnu_pubnames) }
106 .debug_gnu_pubtypes 0 : { *(.debug_gnu_pubtypes) }
107 /* DWARF 4 */
108 .debug_types 0 : { *(.debug_types) }
109 /* DWARF 5 */
110 .debug_macro 0 : { *(.debug_macro) }
111 .debug_addr 0 : { *(.debug_addr) }
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +0200112
Daniel Schwierzeckce2b89e2019-01-06 20:42:43 +0100113 /DISCARD/ : {
114 /* ABI crap starts here */
115 *(.MIPS.abiflags)
116 *(.MIPS.options)
117 *(.options)
118 *(.pdr)
119 *(.reginfo)
120 *(.eh_frame)
Daniel Schwierzeck848a7cc2016-05-26 15:28:38 +0200121 }
122}