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Andrej Rosanofddfa9c2015-04-08 18:56:30 +02001/*
2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
4 *
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
7 *
8 * SPDX-License-Identifier:|____GPL-2.0+
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Gong Qianyu52de2e52015-10-26 19:47:42 +080014#define CONFIG_SYS_FSL_CLK
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020015#define CONFIG_MXC_GPIO
16
17#include <asm/arch/imx-regs.h>
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020018
19#include <config_distro_defaults.h>
20
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020021/* U-Boot environment */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020022#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
23#define CONFIG_ENV_SIZE (8 * 1024)
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020024#define CONFIG_SYS_MMC_ENV_DEV 0
25
26/* U-Boot general configurations */
27#define CONFIG_SYS_CBSIZE 512
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020028#define CONFIG_SYS_MAXARGS 16
29#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
30
31/* UART */
32#define CONFIG_MXC_UART
33#define CONFIG_MXC_UART_BASE UART1_BASE
34#define CONFIG_CONS_INDEX 1
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020035
36/* SD/MMC */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020037#define CONFIG_FSL_ESDHC
38#define CONFIG_SYS_FSL_ESDHC_ADDR 0
39#define CONFIG_SYS_FSL_ESDHC_NUM 1
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020040
41/* USB */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020042#define CONFIG_USB_EHCI_MX5
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020043#define CONFIG_MXC_USB_PORT 1
44#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
45#define CONFIG_MXC_USB_FLAGS 0
46
47/* I2C */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020048#define CONFIG_SYS_I2C
49#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020050#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
51#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020052
53/* Fuse */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020054#define CONFIG_FSL_IIM
55
Andrej Rosanof079e0d2016-06-20 17:21:48 +020056/* U-Boot memory offsets */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020057#define CONFIG_LOADADDR 0x72000000
58#define CONFIG_SYS_TEXT_BASE 0x77800000
59#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Andrej Rosanof079e0d2016-06-20 17:21:48 +020060
61/* Linux boot */
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020062#define CONFIG_HOSTNAME usbarmory
63#define CONFIG_BOOTCOMMAND \
64 "run distro_bootcmd; " \
65 "setenv bootargs console=${console} ${bootargs_default}; " \
Andrej Rosanof079e0d2016-06-20 17:21:48 +020066 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020067 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
Andrej Rosanof079e0d2016-06-20 17:21:48 +020068 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020069
70#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
71
72#include <config_distro_bootcmd.h>
73
74#define MEM_LAYOUT_ENV_SETTINGS \
75 "kernel_addr_r=0x70800000\0" \
76 "fdt_addr_r=0x71000000\0" \
77 "scriptaddr=0x70800000\0" \
78 "pxefile_addr_r=0x70800000\0" \
79 "ramdisk_addr_r=0x73000000\0"
80
81#define CONFIG_EXTRA_ENV_SETTINGS \
82 MEM_LAYOUT_ENV_SETTINGS \
83 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
84 "fdtfile=imx53-usbarmory.dtb\0" \
85 "console=ttymxc0,115200\0" \
86 BOOTENV
87
Andrej Rosanobab77d02016-06-20 17:21:49 +020088#ifndef CONFIG_CMDLINE
Andrej Rosanobab77d02016-06-20 17:21:49 +020089#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
90#define USBARMORY_FIT_ADDR "0x70800000"
91#endif
92
Andrej Rosanofddfa9c2015-04-08 18:56:30 +020093/* Physical Memory Map */
94#define CONFIG_NR_DRAM_BANKS 1
95#define PHYS_SDRAM CSD0_BASE_ADDR
96#define PHYS_SDRAM_SIZE (gd->ram_size)
97
98#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
99#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
100#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
101
102#define CONFIG_SYS_INIT_SP_OFFSET \
103 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
104#define CONFIG_SYS_INIT_SP_ADDR \
105 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
106
107#define CONFIG_SYS_MEMTEST_START 0x70000000
108#define CONFIG_SYS_MEMTEST_END 0x90000000
109
110#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
111
112#endif /* __CONFIG_H */