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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Hans de Goedebb930c32015-04-25 14:07:37 +02002/*
3 * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
4 *
5 * Sunxi PMIC bus access helpers
6 *
7 * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
8 * axp223 uses the rsb bus, these functions abstract this.
Hans de Goedebb930c32015-04-25 14:07:37 +02009 */
10
Samuel Holland60d49282021-10-08 00:17:20 -050011#include <axp_pmic.h>
Hans de Goedebb930c32015-04-25 14:07:37 +020012#include <common.h>
Samuel Holland388fe642021-10-08 00:17:23 -050013#include <dm.h>
Hans de Goedebb930c32015-04-25 14:07:37 +020014#include <asm/arch/p2wi.h>
15#include <asm/arch/rsb.h>
Hans de Goede858b6db2015-04-25 22:18:09 +020016#include <i2c.h>
Samuel Holland388fe642021-10-08 00:17:23 -050017#include <power/pmic.h>
Hans de Goedebb930c32015-04-25 14:07:37 +020018#include <asm/arch/pmic_bus.h>
19
Hans de Goede858b6db2015-04-25 22:18:09 +020020#define AXP152_I2C_ADDR 0x30
21
22#define AXP209_I2C_ADDR 0x34
23
Jernej Skrabecfde828c2021-01-11 21:11:33 +010024#define AXP305_I2C_ADDR 0x36
Andre Przywara107d1ae2023-07-30 01:11:01 +010025#define AXP313_I2C_ADDR 0x36
Jernej Skrabecfde828c2021-01-11 21:11:33 +010026
Hans de Goedebb930c32015-04-25 14:07:37 +020027#define AXP221_CHIP_ADDR 0x68
Hans de Goedebb930c32015-04-25 14:07:37 +020028
Samuel Holland388fe642021-10-08 00:17:23 -050029#if CONFIG_IS_ENABLED(PMIC_AXP)
30static struct udevice *pmic;
31#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050032static int pmic_i2c_address(void)
33{
34 if (IS_ENABLED(CONFIG_AXP152_POWER))
35 return AXP152_I2C_ADDR;
36 if (IS_ENABLED(CONFIG_AXP305_POWER))
37 return AXP305_I2C_ADDR;
Andre Przywara107d1ae2023-07-30 01:11:01 +010038 if (IS_ENABLED(CONFIG_AXP313_POWER))
39 return AXP313_I2C_ADDR;
Samuel Holland1e4d8692021-10-08 00:17:22 -050040
41 /* Other AXP2xx and AXP8xx variants */
42 return AXP209_I2C_ADDR;
43}
Samuel Holland388fe642021-10-08 00:17:23 -050044#endif
Samuel Holland1e4d8692021-10-08 00:17:22 -050045
Hans de Goedebb930c32015-04-25 14:07:37 +020046int pmic_bus_init(void)
47{
48 /* This cannot be 0 because it is used in SPL before BSS is ready */
49 static int needs_init = 1;
Samuel Holland1e4d8692021-10-08 00:17:22 -050050 int ret = 0;
Hans de Goedebb930c32015-04-25 14:07:37 +020051
52 if (!needs_init)
53 return 0;
54
Samuel Holland388fe642021-10-08 00:17:23 -050055#if CONFIG_IS_ENABLED(PMIC_AXP)
56 ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic),
57 &pmic);
58#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050059 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) {
60 p2wi_init();
61 ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR,
62 AXP_PMIC_MODE_REG,
63 AXP_PMIC_MODE_P2WI);
64 } else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) {
65 ret = rsb_init();
66 if (ret)
67 return ret;
Hans de Goedebb930c32015-04-25 14:07:37 +020068
Samuel Holland1e4d8692021-10-08 00:17:22 -050069 ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR,
70 AXP_PMIC_PRI_RUNTIME_ADDR);
71 }
Samuel Holland388fe642021-10-08 00:17:23 -050072#endif
Hans de Goedebb930c32015-04-25 14:07:37 +020073
Samuel Holland1e4d8692021-10-08 00:17:22 -050074 needs_init = ret;
75
76 return ret;
Hans de Goedebb930c32015-04-25 14:07:37 +020077}
78
79int pmic_bus_read(u8 reg, u8 *data)
80{
Samuel Holland388fe642021-10-08 00:17:23 -050081#if CONFIG_IS_ENABLED(PMIC_AXP)
82 return pmic_read(pmic, reg, data, 1);
83#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050084 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
85 return p2wi_read(reg, data);
86 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
87 return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
88
89 return i2c_read(pmic_i2c_address(), reg, 1, data, 1);
Samuel Holland388fe642021-10-08 00:17:23 -050090#endif
Hans de Goedebb930c32015-04-25 14:07:37 +020091}
92
93int pmic_bus_write(u8 reg, u8 data)
94{
Samuel Holland388fe642021-10-08 00:17:23 -050095#if CONFIG_IS_ENABLED(PMIC_AXP)
96 return pmic_write(pmic, reg, &data, 1);
97#else
Samuel Holland1e4d8692021-10-08 00:17:22 -050098 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
99 return p2wi_write(reg, data);
100 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
101 return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
102
103 return i2c_write(pmic_i2c_address(), reg, 1, &data, 1);
Samuel Holland388fe642021-10-08 00:17:23 -0500104#endif
Hans de Goedebb930c32015-04-25 14:07:37 +0200105}
106
107int pmic_bus_setbits(u8 reg, u8 bits)
108{
109 int ret;
110 u8 val;
111
112 ret = pmic_bus_read(reg, &val);
113 if (ret)
114 return ret;
115
Olliver Schinaglfa2ca7c2018-11-21 20:05:26 +0200116 if ((val & bits) == bits)
117 return 0;
118
Hans de Goedebb930c32015-04-25 14:07:37 +0200119 val |= bits;
120 return pmic_bus_write(reg, val);
121}
122
123int pmic_bus_clrbits(u8 reg, u8 bits)
124{
125 int ret;
126 u8 val;
127
128 ret = pmic_bus_read(reg, &val);
129 if (ret)
130 return ret;
131
Olliver Schinaglfa2ca7c2018-11-21 20:05:26 +0200132 if (!(val & bits))
133 return 0;
134
Hans de Goedebb930c32015-04-25 14:07:37 +0200135 val &= ~bits;
136 return pmic_bus_write(reg, val);
137}