blob: c228bbf777252a1585fc997a893e873df599fa30 [file] [log] [blame]
Adam Ford14879032020-05-03 08:11:33 -05001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2020 Compass Electronics Group, LLC
4 */
5
6#include <common.h>
7#include <miiphy.h>
8#include <netdev.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06009#include <asm/global_data.h>
Adam Ford14879032020-05-03 08:11:33 -050010
11#include <asm/arch/clock.h>
12#include <asm/arch/sys_proto.h>
13#include <asm/io.h>
14
15DECLARE_GLOBAL_DATA_PTR;
16
Adam Ford14879032020-05-03 08:11:33 -050017#if IS_ENABLED(CONFIG_FEC_MXC)
18static int setup_fec(void)
19{
20 struct iomuxc_gpr_base_regs *gpr =
21 (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
22
23 /* Use 125M anatop REF_CLK1 for ENET1, not from external */
24 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
25
26 return 0;
27}
28
29int board_phy_config(struct phy_device *phydev)
30{
31 /* enable rgmii rxc skew and phy mode select to RGMII copper */
32 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
33 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
34
35 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
36 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
37 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
38 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
39
40 if (phydev->drv->config)
41 phydev->drv->config(phydev);
42 return 0;
43}
44#endif
45
46int board_init(void)
47{
48 if (IS_ENABLED(CONFIG_FEC_MXC))
49 setup_fec();
50
51 return 0;
52}