| // SPDX-License-Identifier: GPL-2.0+ |
| * Copyright (C) 2018-2020 Texas Instruments Incorporated - https://www.ti.com/ |
| * Lokesh Vutla <lokeshvutla@ti.com> |
| * Suman Anna <s-anna@ti.com> |
| * (This file is derived from arch/arm/mach-zynqmp/cpu.c) |
| #include <asm/armv8/mmu.h> |
| struct mm_region k3_mem_map[] = { |
| .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| struct mm_region *mem_map = k3_mem_map; |