| commit | ff7b11e1864134523247f4e55618cba98d60ebda | [log] [tgz] |
|---|---|---|
| author | Patrice Chotard <patrice.chotard@st.com> | Thu Feb 08 17:20:49 2018 +0100 |
| committer | Tom Rini <trini@konsulko.com> | Tue Mar 13 21:45:37 2018 -0400 |
| tree | 95e115e585b41b95a80b4f702ecf1be2d7619896 | |
| parent | 8aca2d1a222677acabf25b681bf624b0ac7e1d44 [diff] |
clk: clk_stm32f: Configure SAI PLL to generate LTDC pixel clock Configure SAI PLL configuration to generate LTDC pixel clock on the PLLSAIR output. PLLSAI is enabled only if CONFIG_VIDEO_STM32 flag is set. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>