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git01.mediatek.com / filogic / uboot / fc1aa35bb0dfc4dc505f1f17c2bc679c84f13baa / . / board / freescale / t104xrdb / t1042_spi_rcw.cfg
blob: e8a3ad1280421f8fa4fa10ebf76cd30818667f85 [file] [log] [blame]
#PBL preamble and RCW header
aa55aa55 010e0100
# serdes protocol 0x86
0c18000e 0e000000 00000000 00000000
86000002 80000002 5c027000 01000000
00000000 00000000 00000000 00032810
00000000 0342500f 00000000 00000000