commit | f0297ba8ad314b5c38913b05da225e3a930239ef | [log] [tgz] |
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author | Santhosh Kumar K <s-k6@ti.com> | Mon Jan 06 14:37:04 2025 +0530 |
committer | Tom Rini <trini@konsulko.com> | Tue Jan 14 15:47:07 2025 -0600 |
tree | 9c04ebf46fae8126210742ad6cac1c64ebc7db1e | |
parent | 3f735f727fb8b97a400b2c91926ff3255a129fe0 [diff] |
ram: k3-ddrss: Enable ECC interrupts Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts by setting the respective bits in the DDRSS_V2A_INT_SET_REG register. Signed-off-by: Santhosh Kumar K <s-k6@ti.com>