tree 9c04ebf46fae8126210742ad6cac1c64ebc7db1e
parent 3f735f727fb8b97a400b2c91926ff3255a129fe0
author Santhosh Kumar K <s-k6@ti.com> 1736154424 +0530
committer Tom Rini <trini@konsulko.com> 1736891227 -0600

ram: k3-ddrss: Enable ECC interrupts

Enable ECC 1-bit error, 2-bit error, multiple 1-bit error interrupts
by setting the respective bits in the DDRSS_V2A_INT_SET_REG register.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>