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git01.mediatek.com / filogic / uboot / ef5458ff4f2f7bebf83bf1c3ba1a3485655b1269 / . / arch / arm / mach-socfpga / include / mach
tree: 998a5750f3cf169f5487866713db88d6546ef818 [path history] [tgz]
  1. base_addr_a10.h
  2. base_addr_ac5.h
  3. base_addr_s10.h
  4. boot0.h
  5. clock_manager.h
  6. clock_manager_arria10.h
  7. clock_manager_gen5.h
  8. clock_manager_s10.h
  9. clock_manager_soc64.h
  10. firewall.h
  11. fpga_manager.h
  12. fpga_manager_arria10.h
  13. fpga_manager_gen5.h
  14. freeze_controller.h
  15. gpio.h
  16. handoff_s10.h
  17. mailbox_s10.h
  18. misc.h
  19. nic301.h
  20. pinmux.h
  21. reset_manager.h
  22. reset_manager_arria10.h
  23. reset_manager_gen5.h
  24. reset_manager_soc64.h
  25. scan_manager.h
  26. scu.h
  27. sdram.h
  28. sdram_arria10.h
  29. sdram_gen5.h
  30. system_manager.h
  31. system_manager_arria10.h
  32. system_manager_gen5.h
  33. system_manager_soc64.h
  34. timer.h