arch/arm/dts/pxa1908.dtsi

// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;

#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	model = "Marvell Armada PXA1908";
	compatible = "marvell,pxa1908";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0 0>;
			enable-method = "psci";
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0 1>;
			enable-method = "psci";
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0 2>;
			enable-method = "psci";
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0 3>;
			enable-method = "psci";
		};
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gic: interrupt-controller@d1df9000 {
			compatible = "arm,gic-400";
			reg = <0 0xd1df9000 0 0x1000>,
				<0 0xd1dfa000 0 0x2000>,
				/* The subsequent registers are guesses. */
				<0 0xd1dfc000 0 0x2000>,
				<0 0xd1dfe000 0 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		apb@d4000000 {
			compatible = "simple-bus";
			reg = <0 0xd4000000 0 0x200000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0 0xd4000000 0x200000>;

			uart0: serial@17000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0x17000 0x1000>;
				clock-frequency = <14745600>;
				reg-shift = <2>;
			};

			uart1: serial@18000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0x18000 0x1000>;
				clock-frequency = <14745600>;
				reg-shift = <2>;
			};

			uart2: serial@36000 {
				compatible = "mrvl,mmp-uart", "intel,xscale-uart";
				reg = <0x36000 0x1000>;
				clock-frequency = <117000000>;
				reg-shift = <2>;
			};
		};
	};
};