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git01.mediatek.com / filogic / uboot / ec472e0cb8e4100da1fe0645c02f267c23152885 / . / arch / arm / mach-socfpga / include / mach
tree: 8c3239c0f63f8bbe81b134991bb11ee77ed971d1 [path history] [tgz]
  1. base_addr_a10.h
  2. base_addr_ac5.h
  3. base_addr_s10.h
  4. boot0.h
  5. clock_manager.h
  6. clock_manager_arria10.h
  7. clock_manager_gen5.h
  8. fpga_manager.h
  9. fpga_manager_arria10.h
  10. fpga_manager_gen5.h
  11. freeze_controller.h
  12. gpio.h
  13. misc.h
  14. nic301.h
  15. pinmux.h
  16. reset_manager.h
  17. reset_manager_arria10.h
  18. reset_manager_gen5.h
  19. scan_manager.h
  20. scu.h
  21. sdram.h
  22. sdram_arria10.h
  23. system_manager.h
  24. system_manager_arria10.h
  25. system_manager_gen5.h
  26. timer.h