arm: Move SYS_FSL_IFC_BANK_COUNT to Kconfig
Move this option to Kconfig and clean up existing uses.
This option is also used by PowerPC SoCs.
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig
index e8264f5..88983f4 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -23,4 +23,9 @@
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"
+config SYS_FSL_IFC_BANK_COUNT
+ int "Maximum banks of Integrated flash controller"
+ depends on ARCH_LS1021A
+ default 8
+
endmenu
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 352d1d3..c6cf774 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -50,4 +50,11 @@
cores, count the reserved ports. This will allocate enough memory
in spin table to properly handle all cores.
+config SYS_FSL_IFC_BANK_COUNT
+ int "Maximum banks of Integrated flash controller"
+ depends on ARCH_LS1043A || ARCH_LS1046A || ARCH_LS2080A
+ default 4 if ARCH_LS1043A
+ default 4 if ARCH_LS1046A
+ default 8 if ARCH_LS2080A
+
endmenu