| /* DO NOT EDIT THIS FILE |
| * Automatically generated by generate-cdef-headers.xsl |
| * DO NOT EDIT THIS FILE |
| */ |
| |
| #ifndef __BFIN_CDEF_ADSP_BF561_proc__ |
| #define __BFIN_CDEF_ADSP_BF561_proc__ |
| |
| #include "../mach-common/ADSP-EDN-core_cdef.h" |
| |
| #include "../mach-common/ADSP-EDN-DUAL-CORE-extended_cdef.h" |
| |
| #define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST) |
| #define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST, val) |
| #define bfin_read_SICA_SYSCR() bfin_read16(SICA_SYSCR) |
| #define bfin_write_SICA_SYSCR(val) bfin_write16(SICA_SYSCR, val) |
| #define bfin_read_SICA_RVECT() bfin_read16(SICA_RVECT) |
| #define bfin_write_SICA_RVECT(val) bfin_write16(SICA_RVECT, val) |
| #define bfin_read_SICA_IMASK0() bfin_read32(SICA_IMASK0) |
| #define bfin_write_SICA_IMASK0(val) bfin_write32(SICA_IMASK0, val) |
| #define bfin_read_SICA_IMASK1() bfin_read32(SICA_IMASK1) |
| #define bfin_write_SICA_IMASK1(val) bfin_write32(SICA_IMASK1, val) |
| #define bfin_read_SICA_ISR0() bfin_read32(SICA_ISR0) |
| #define bfin_write_SICA_ISR0(val) bfin_write32(SICA_ISR0, val) |
| #define bfin_read_SICA_ISR1() bfin_read32(SICA_ISR1) |
| #define bfin_write_SICA_ISR1(val) bfin_write32(SICA_ISR1, val) |
| #define bfin_read_SICA_IWR0() bfin_read32(SICA_IWR0) |
| #define bfin_write_SICA_IWR0(val) bfin_write32(SICA_IWR0, val) |
| #define bfin_read_SICA_IWR1() bfin_read32(SICA_IWR1) |
| #define bfin_write_SICA_IWR1(val) bfin_write32(SICA_IWR1, val) |
| #define bfin_read_SICA_IAR0() bfin_read32(SICA_IAR0) |
| #define bfin_write_SICA_IAR0(val) bfin_write32(SICA_IAR0, val) |
| #define bfin_read_SICA_IAR1() bfin_read32(SICA_IAR1) |
| #define bfin_write_SICA_IAR1(val) bfin_write32(SICA_IAR1, val) |
| #define bfin_read_SICA_IAR2() bfin_read32(SICA_IAR2) |
| #define bfin_write_SICA_IAR2(val) bfin_write32(SICA_IAR2, val) |
| #define bfin_read_SICA_IAR3() bfin_read32(SICA_IAR3) |
| #define bfin_write_SICA_IAR3(val) bfin_write32(SICA_IAR3, val) |
| #define bfin_read_SICA_IAR4() bfin_read32(SICA_IAR4) |
| #define bfin_write_SICA_IAR4(val) bfin_write32(SICA_IAR4, val) |
| #define bfin_read_SICA_IAR5() bfin_read32(SICA_IAR5) |
| #define bfin_write_SICA_IAR5(val) bfin_write32(SICA_IAR5, val) |
| #define bfin_read_SICA_IAR6() bfin_read32(SICA_IAR6) |
| #define bfin_write_SICA_IAR6(val) bfin_write32(SICA_IAR6, val) |
| #define bfin_read_SICA_IAR7() bfin_read32(SICA_IAR7) |
| #define bfin_write_SICA_IAR7(val) bfin_write32(SICA_IAR7, val) |
| #define bfin_read_SICB_SWRST() bfin_read16(SICB_SWRST) |
| #define bfin_write_SICB_SWRST(val) bfin_write16(SICB_SWRST, val) |
| #define bfin_read_SICB_SYSCR() bfin_read16(SICB_SYSCR) |
| #define bfin_write_SICB_SYSCR(val) bfin_write16(SICB_SYSCR, val) |
| #define bfin_read_SICB_RVECT() bfin_read16(SICB_RVECT) |
| #define bfin_write_SICB_RVECT(val) bfin_write16(SICB_RVECT, val) |
| #define bfin_read_SICB_IMASK0() bfin_read32(SICB_IMASK0) |
| #define bfin_write_SICB_IMASK0(val) bfin_write32(SICB_IMASK0, val) |
| #define bfin_read_SICB_IMASK1() bfin_read32(SICB_IMASK1) |
| #define bfin_write_SICB_IMASK1(val) bfin_write32(SICB_IMASK1, val) |
| #define bfin_read_SICB_ISR0() bfin_read32(SICB_ISR0) |
| #define bfin_write_SICB_ISR0(val) bfin_write32(SICB_ISR0, val) |
| #define bfin_read_SICB_ISR1() bfin_read32(SICB_ISR1) |
| #define bfin_write_SICB_ISR1(val) bfin_write32(SICB_ISR1, val) |
| #define bfin_read_SICB_IWR0() bfin_read32(SICB_IWR0) |
| #define bfin_write_SICB_IWR0(val) bfin_write32(SICB_IWR0, val) |
| #define bfin_read_SICB_IWR1() bfin_read32(SICB_IWR1) |
| #define bfin_write_SICB_IWR1(val) bfin_write32(SICB_IWR1, val) |
| #define bfin_read_SICB_IAR0() bfin_read32(SICB_IAR0) |
| #define bfin_write_SICB_IAR0(val) bfin_write32(SICB_IAR0, val) |
| #define bfin_read_SICB_IAR1() bfin_read32(SICB_IAR1) |
| #define bfin_write_SICB_IAR1(val) bfin_write32(SICB_IAR1, val) |
| #define bfin_read_SICB_IAR2() bfin_read32(SICB_IAR2) |
| #define bfin_write_SICB_IAR2(val) bfin_write32(SICB_IAR2, val) |
| #define bfin_read_SICB_IAR3() bfin_read32(SICB_IAR3) |
| #define bfin_write_SICB_IAR3(val) bfin_write32(SICB_IAR3, val) |
| #define bfin_read_SICB_IAR4() bfin_read32(SICB_IAR4) |
| #define bfin_write_SICB_IAR4(val) bfin_write32(SICB_IAR4, val) |
| #define bfin_read_SICB_IAR5() bfin_read32(SICB_IAR5) |
| #define bfin_write_SICB_IAR5(val) bfin_write32(SICB_IAR5, val) |
| #define bfin_read_SICB_IAR6() bfin_read32(SICB_IAR6) |
| #define bfin_write_SICB_IAR6(val) bfin_write32(SICB_IAR6, val) |
| #define bfin_read_SICB_IAR7() bfin_read32(SICB_IAR7) |
| #define bfin_write_SICB_IAR7(val) bfin_write32(SICB_IAR7, val) |
| #define bfin_read_PPI0_CONTROL() bfin_read16(PPI0_CONTROL) |
| #define bfin_write_PPI0_CONTROL(val) bfin_write16(PPI0_CONTROL, val) |
| #define bfin_read_PPI0_STATUS() bfin_read16(PPI0_STATUS) |
| #define bfin_write_PPI0_STATUS(val) bfin_write16(PPI0_STATUS, val) |
| #define bfin_read_PPI0_DELAY() bfin_read16(PPI0_DELAY) |
| #define bfin_write_PPI0_DELAY(val) bfin_write16(PPI0_DELAY, val) |
| #define bfin_read_PPI0_COUNT() bfin_read16(PPI0_COUNT) |
| #define bfin_write_PPI0_COUNT(val) bfin_write16(PPI0_COUNT, val) |
| #define bfin_read_PPI0_FRAME() bfin_read16(PPI0_FRAME) |
| #define bfin_write_PPI0_FRAME(val) bfin_write16(PPI0_FRAME, val) |
| #define bfin_read_PPI1_CONTROL() bfin_read16(PPI1_CONTROL) |
| #define bfin_write_PPI1_CONTROL(val) bfin_write16(PPI1_CONTROL, val) |
| #define bfin_read_PPI1_STATUS() bfin_read16(PPI1_STATUS) |
| #define bfin_write_PPI1_STATUS(val) bfin_write16(PPI1_STATUS, val) |
| #define bfin_read_PPI1_DELAY() bfin_read16(PPI1_DELAY) |
| #define bfin_write_PPI1_DELAY(val) bfin_write16(PPI1_DELAY, val) |
| #define bfin_read_PPI1_COUNT() bfin_read16(PPI1_COUNT) |
| #define bfin_write_PPI1_COUNT(val) bfin_write16(PPI1_COUNT, val) |
| #define bfin_read_PPI1_FRAME() bfin_read16(PPI1_FRAME) |
| #define bfin_write_PPI1_FRAME(val) bfin_write16(PPI1_FRAME, val) |
| #define bfin_read_UART_THR() bfin_read16(UART_THR) |
| #define bfin_write_UART_THR(val) bfin_write16(UART_THR, val) |
| #define bfin_read_UART_RBR() bfin_read16(UART_RBR) |
| #define bfin_write_UART_RBR(val) bfin_write16(UART_RBR, val) |
| #define bfin_read_UART_DLL() bfin_read16(UART_DLL) |
| #define bfin_write_UART_DLL(val) bfin_write16(UART_DLL, val) |
| #define bfin_read_UART_DLH() bfin_read16(UART_DLH) |
| #define bfin_write_UART_DLH(val) bfin_write16(UART_DLH, val) |
| #define bfin_read_UART_IER() bfin_read16(UART_IER) |
| #define bfin_write_UART_IER(val) bfin_write16(UART_IER, val) |
| #define bfin_read_UART_IIR() bfin_read16(UART_IIR) |
| #define bfin_write_UART_IIR(val) bfin_write16(UART_IIR, val) |
| #define bfin_read_UART_LCR() bfin_read16(UART_LCR) |
| #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR, val) |
| #define bfin_read_UART_MCR() bfin_read16(UART_MCR) |
| #define bfin_write_UART_MCR(val) bfin_write16(UART_MCR, val) |
| #define bfin_read_UART_LSR() bfin_read16(UART_LSR) |
| #define bfin_write_UART_LSR(val) bfin_write16(UART_LSR, val) |
| #define bfin_read_UART_MSR() bfin_read16(UART_MSR) |
| #define bfin_write_UART_MSR(val) bfin_write16(UART_MSR, val) |
| #define bfin_read_UART_SCR() bfin_read16(UART_SCR) |
| #define bfin_write_UART_SCR(val) bfin_write16(UART_SCR, val) |
| #define bfin_read_UART_GCTL() bfin_read16(UART_GCTL) |
| #define bfin_write_UART_GCTL(val) bfin_write16(UART_GCTL, val) |
| #define bfin_read_UART_GBL() bfin_read16(UART_GBL) |
| #define bfin_write_UART_GBL(val) bfin_write16(UART_GBL, val) |
| #define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL) |
| #define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL, val) |
| #define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0) |
| #define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val) |
| #define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1) |
| #define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val) |
| #define bfin_read_EBIU_SDGCTL() bfin_read32(EBIU_SDGCTL) |
| #define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL, val) |
| #define bfin_read_EBIU_SDBCTL() bfin_read32(EBIU_SDBCTL) |
| #define bfin_write_EBIU_SDBCTL(val) bfin_write32(EBIU_SDBCTL, val) |
| #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC) |
| #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val) |
| #define bfin_read_EBIU_SDSTAT() bfin_read16(EBIU_SDSTAT) |
| #define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT, val) |
| |
| #endif /* __BFIN_CDEF_ADSP_BF561_proc__ */ |