arm: clean cache management
unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/cpu/sa1100/cpu.c b/cpu/sa1100/cpu.c
index d0dfa3d..6c897d0 100644
--- a/cpu/sa1100/cpu.c
+++ b/cpu/sa1100/cpu.c
@@ -38,6 +38,8 @@
DECLARE_GLOBAL_DATA_PTR;
#endif
+static void cache_flush(void);
+
int cpu_init (void)
{
/*
@@ -59,17 +61,14 @@
* just disable everything that can disturb booting linux
*/
- unsigned long i;
-
disable_interrupts ();
/* turn off I-cache */
- asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
- i &= ~0x1000;
- asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
+ icache_disable();
+ dcache_disable();
/* flush I-cache */
- asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
+ cache_flush();
return (0);
}
@@ -86,49 +85,10 @@
return (0);
}
-static void cp_delay (void)
-{
- volatile int i;
-
- /* copro seems to need some delay between reading and writing */
- for (i = 0; i < 100; i++);
-}
-
-void icache_enable (void)
-{
- ulong reg;
-
- reg = get_cr ();
- cp_delay ();
- set_cr (reg | CR_C);
-}
-
-void icache_disable (void)
-{
- ulong reg;
-
- reg = get_cr ();
- cp_delay ();
- set_cr (reg & ~CR_C);
-}
-
-int icache_status (void)
-{
- return (get_cr () & CR_C) != 0;
-}
-
-/* we will never enable dcache, because we have to setup MMU first */
-void dcache_enable (void)
+/* flush I/D-cache */
+static void cache_flush (void)
{
- return;
-}
-
-void dcache_disable (void)
-{
- return;
-}
+ unsigned long i = 0;
-int dcache_status (void)
-{
- return 0; /* always off */
+ asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
}