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filogic
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df41fc634d9e2e7899dc1023a7390708e6d8b886
/
.
/
board
/
renesas
/
lager
/
Makefile
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#
# board/renesas/lager/Makefile
#
# Copyright (C) 2013 Renesas Electronics Corporation
#
# SPDX-License-Identifier: GPL-2.0
#
ifdef CONFIG_SPL_BUILD
obj
-
y
:=
lager_spl
.
o
else
obj
-
y
:=
lager
.
o qos
.
o
endif