| commit | 0a08f44b102a7311a86184202e3546d3b5e34499 | [log] [tgz] |
|---|---|---|
| author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | Thu Jul 20 01:28:59 2023 -0600 |
| committer | Michal Simek <michal.simek@amd.com> | Fri Jul 21 09:00:39 2023 +0200 |
| tree | 7da3617379af83d0dbdba59cad01025524f6deb6 | |
| parent | 025964b6b10ec73a0a3ee76122f241a6b415bdde [diff] |
clk: zynqmp: Add gem rx and tsu clocks to return register Add gem_tsu and gem0_rx till gem3_rx to return proper register from zynqmp_clk_get_register. Otherwise firmware won't be able to set clock for these due to incorrect register address. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230720072859.3724-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>