commit | 025964b6b10ec73a0a3ee76122f241a6b415bdde | [log] [tgz] |
---|---|---|
author | Ashok Reddy Soma <ashok.reddy.soma@amd.com> | Wed Jul 19 02:49:12 2023 -0600 |
committer | Michal Simek <michal.simek@amd.com> | Fri Jul 21 09:00:39 2023 +0200 |
tree | 846209b84de10786e055e7a6de55a74d5e9c89db | |
parent | 3789b994aac231fa5b10ca51bc1285d2f4036922 [diff] |
clk: zynqmp: Add set_rate support for gem rx and tsu clks gem0_rx till gem3_rx and gem_tsu are missing from set rate function. Add them, so that they can be set from pmu firmware via clock framework. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230719084912.30209-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>