| /* |
| * Copyright (c) 2016 Rockchip Electronics Co., Ltd |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #include <common.h> |
| #include <asm/armv8/mmu.h> |
| #include <asm/io.h> |
| #include <asm/arch/hardware.h> |
| |
| #define GRF_EMMCCORE_CON11 0xff77f02c |
| |
| static struct mm_region rk3399_mem_map[] = { |
| { |
| .virt = 0x0UL, |
| .phys = 0x0UL, |
| .size = 0xf8000000UL, |
| .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| PTE_BLOCK_INNER_SHARE |
| }, { |
| .virt = 0xf8000000UL, |
| .phys = 0xf8000000UL, |
| .size = 0x08000000UL, |
| .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| PTE_BLOCK_NON_SHARE | |
| PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| }, { |
| /* List terminator */ |
| 0, |
| } |
| }; |
| |
| struct mm_region *mem_map = rk3399_mem_map; |
| |
| int arch_cpu_init(void) |
| { |
| /* We do some SoC one time setting here. */ |
| |
| /* Emmc clock generator: disable the clock multipilier */ |
| rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff); |
| |
| return 0; |
| } |