| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * Copyright 2018 NXP |
| */ |
| |
| &{/aliases} { |
| u-boot,dm-pre-reloc; |
| display0 = &lcdif; |
| }; |
| |
| &{/soc} { |
| u-boot,dm-pre-reloc; |
| }; |
| |
| &aips2 { |
| u-boot,dm-pre-reloc; |
| }; |
| |
| &iomuxc { |
| u-boot,dm-pre-reloc; |
| }; |
| |
| &lcdif { |
| display = <&display0>; |
| u-boot,dm-pre-reloc; |
| |
| display0: display@0 { |
| bits-per-pixel = <24>; |
| bus-width = <24>; |
| |
| display-timings { |
| native-mode = <&timing0>; |
| |
| timing0: timing0 { |
| clock-frequency = <9200000>; |
| hactive = <480>; |
| vactive = <272>; |
| hfront-porch = <8>; |
| hback-porch = <4>; |
| hsync-len = <41>; |
| vback-porch = <2>; |
| vfront-porch = <4>; |
| vsync-len = <10>; |
| hsync-active = <0>; |
| vsync-active = <0>; |
| de-active = <1>; |
| pixelclk-active = <0>; |
| }; |
| }; |
| }; |
| }; |