| // SPDX-License-Identifier: GPL-2.0+ |
| /* |
| * (C) Copyright 2016 Rockchip Electronics Co., Ltd |
| * (C) Copyright 2020 Peter Robinson <pbrobinson at gmail.com> |
| */ |
| |
| #include <common.h> |
| #include <dm.h> |
| #include <syscon.h> |
| #include <asm/arch-rockchip/clock.h> |
| #include <asm/arch-rockchip/grf_rk3399.h> |
| #include <asm/arch-rockchip/hardware.h> |
| #include <linux/printk.h> |
| |
| #define GRF_IO_VSEL_BT565_SHIFT 0 |
| #define PMUGRF_CON0_VSEL_SHIFT 8 |
| |
| #ifdef CONFIG_MISC_INIT_R |
| static void setup_iodomain(void) |
| { |
| struct rk3399_grf_regs *grf = |
| syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
| struct rk3399_pmugrf_regs *pmugrf = |
| syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); |
| |
| /* BT565 is in 1.8v domain */ |
| rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); |
| |
| /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ |
| rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); |
| } |
| |
| int rockchip_early_misc_init_r(void) |
| { |
| setup_iodomain(); |
| |
| return 0; |
| } |
| #endif |